# US 12,192,712 B2 · Readout circuit for microphone sensor

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- Number: US 12,192,712 B2
- Document ID: US12192712B2
- Status: Granted
- Kind: B2
- Application number: 18/087,967
- Filed: 2022-12-23
- Published: 2023-08-17
- Granted: 2025-01-07
- Earliest claimed: 2022-02-15
- Assignees: Fyd Co., Ltd.
- Applicants: Fyd Co., Ltd.
- Inventors: Joon Jea Sung; Young Che Park
- Web page: https://patentgrep.com/patent/US12192712B2

## CPC

- H04R 3/00: Circuits for transducers (arrangements for producing a reverberation or echo sound G10K15/08; amplifiers H03F)
- H03K 17/6872: {using complementary field-effect transistors}
- H04R 1/08: Mouthpieces; {Microphones;} Attachments therefor
- H04R 2410/03: Reduction of intrinsic noise in microphones
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- H04R: LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS (producing sounds with frequency not determined by supply frequency G10K)
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

A readout circuit for a microphone sensor includes a first transistor having a first gate end connected to the input terminal, a first source end connected to the output terminal and a power terminal, a first drain end connected to ground, a second transistor having a second drain end connected to the output terminal and the first source terminal, a second source end connected to the power terminal, and a second gate end connected to a reference terminal, a third transistor having a third drain end connected to the first source terminal, the second drain end, and the output terminal, a third gate terminal connected to the reference terminal, and a third source end connected to the ground, a fourth transistor having a fourth drain end, a fourth gate end, and a fourth source end connected to the first drain terminal, and a diode unit.

## Claims

### Claim 1

A readout circuit for a microphone sensor, the readout circuit comprising:
an input terminal to which a sensing signal is configured to be inputted from the microphone sensor; and
an output terminal to which the sensing signal is configured to be outputted;
a first transistor having a first gate end connected to the input terminal, a first source end connected to the output terminal and a power terminal, and a first drain end connected to ground;
a second transistor having a second drain end connected to the output terminal and the first source terminal, a second source end connected to the power terminal, and a second gate end connected to a reference terminal;
a third transistor having a third drain end connected to the first source terminal, the second drain end, and the output terminal, a third gate terminal connected to the reference terminal, and a third source end connected to the ground;
a fourth transistor having a fourth drain end connected to the reference terminal and the power terminal, a fourth gate end connected to the output terminal and the third drain end, and a fourth source end connected to the first drain terminal; and
a diode unit connected to the fourth drain end, the fourth source end, and the first drain end.

### Claim 2 (depends on 1)

The readout circuit of claim 1, wherein the second transistor includes any one transistor of a N-type transistor (NTR) and a P-type transistor (PTR), and the third transistor includes an opposite transistor of the NTR and the PTR.

### Claim 3 (depends on 1)

The readout circuit of claim 1, wherein the diode unit uses any one of an N-type transistor (NTR) diode connection, a P-type transistor (PTR) diode connection and a normal junction diode.

### Claim 4 (depends on 1)

The readout circuit of claim 1, wherein the first transistor and the second transistor includes a P-type transistor, and the third transistor, the fourth transistor and the diode unit includes an N-type transistor.