# US 12,192,663 B2 · Image sensor, level shifter circuit, and operation method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,192,663 B2 - Document ID: US12192663B2 - Status: Granted - Kind: B2 - Application number: 18/300,363 - Filed: 2023-04-13 - Published: 2023-11-16 - Granted: 2025-01-07 - Earliest claimed: 2022-05-13 - Assignees: Guangzhou Tyrafos Semiconductor Technologies Co., LTD - Applicants: Guangzhou Tyrafos Semiconductor Technologies Co., LTD - Inventors: Ping-Hung Yin; Jia-Shyang Wang; Jia-Sian Lyu - Web page: https://patentgrep.com/patent/US12192663B2 ## CPC - H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters - G06F 1/08: Clock generators with changeable or programmable clock frequency - H03K 19/018521: {of complementary type, e.g. CMOS} - H03L 7/099: concerning mainly the controlled oscillator of the loop - H04N 25/60: Noise processing, e.g. detecting, correcting, reducing or removing noise - H04N 25/627: Detection or reduction of inverted contrast or eclipsing effects - H04N 25/63: applied to dark current - H04N 25/709: Circuitry for control of the power supply - H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components - H04N 25/772: comprising A/D, V/T, V/F, I/T or I/F converters - H04N 25/778: comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself - H04N 25/779: Circuitry for scanning or addressing the pixel array - H04N 25/7795: {Circuitry for generating timing or clock signals} - H10F 39/026: {Wafer-level processing} - H10F 39/8037: {the integrated elements comprising a transistor} - H10F 39/811: {Interconnections} - H10W 90/00: Package configurations - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B) - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract An image sensor, a level shifter circuit, and an operation method thereof are provided. The image sensor includes a pixel circuit and a pixel driving circuit. The pixel driving circuit includes first, second, third, fourth, fifth, and sixth transistors. A first terminal of the first transistor is coupled to a first voltage. A first terminal of the second transistor is coupled to the first voltage, and a control terminal of the second transistor is coupled to a control terminal of the first transistor and a second terminal of the first transistor. A first terminal of the third transistor is coupled to the second terminal of the first transistor, and a second terminal of the third transistor is coupled to a ground voltage. A first terminal of the fourth transistor is coupled to a second terminal of the second transistor and an output terminal. ## Claims ### Claim 1 An image sensor, comprising: a pixel circuit; and a pixel driving circuit, coupled to the pixel circuit and comprising: a first transistor, wherein a first terminal of the first transistor is coupled to a first voltage; a second transistor, wherein a first terminal of the second transistor is coupled to the first voltage, and a control terminal of the second transistor is coupled to a control terminal of the first transistor and a second terminal of the first transistor; a third transistor, wherein a first terminal of the third transistor is coupled to the second terminal of the first transistor, and a second terminal of the third transistor is coupled to a ground voltage; a fourth transistor, wherein a first terminal of the fourth transistor is coupled to a second terminal of the second transistor and an output terminal; a fifth transistor, wherein a first terminal of the fifth transistor is coupled to a second terminal of the fourth transistor, and a second terminal of the fifth transistor is coupled to a second voltage; and a sixth transistor, wherein a first terminal of the sixth transistor is coupled to the second terminal of the fourth transistor, and a second terminal of the sixth transistor is coupled to the ground voltage, wherein the output terminal is coupled to the pixel circuit, and the output terminal outputs a driving signal to the pixel circuit. ### Claim 2 (depends on 1) The image sensor according to claim 1, wherein the first voltage is greater than the ground voltage, and the second voltage is less than the ground voltage. ### Claim 3 (depends on 1) The image sensor according to claim 1, wherein the first transistor and the second transistor are P-type transistors. ### Claim 4 (depends on 1) The image sensor according to claim 1, wherein the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are N-type transistors. ### Claim 5 (depends on 1) The image sensor according to claim 1, further comprising: a timing controller, coupled to the pixel driving circuit and configured to provide a first enabling signal to a control terminal of the third transistor, and provide a second enabling signal to a control terminal of the fourth transistor, wherein a signal waveform of the first enabling signal is inverted to a signal waveform of the second enabling signal, swings of the first enabling signal and the second enabling signal are from the ground voltage to a third voltage, and the third voltage is less than the first voltage. ### Claim 6 (depends on 5) The image sensor according to claim 5, further comprising: a potential dropper, coupled to the pixel driving circuit and the timing controller, and configured to provide a first control signal to a control terminal of the fifth transistor, and provide a second control signal to a control terminal of the sixth transistor, wherein a signal waveform of the first control signal is inverted to a signal waveform of the second control signal. ### Claim 7 (depends on 6) The image sensor according to claim 6, further comprising: a plurality of pixel driving circuits, coupled to the potential dropper, wherein the potential dropper provides the first control signal and the second control signal to the pixel driving circuits. ### Claim 8 (depends on 7) The image sensor according to claim 7, wherein a number of the pixel driving circuits is 8. ### Claim 9 (depends on 6) The image sensor according to claim 6, wherein the timing controller provides a first original control signal and a second original control signal to the potential dropper, so that the potential dropper generates the first control signal and the second control signal according to the first original control signal and the second original control signal, wherein a signal waveform of the first original control signal is inverted to a signal waveform of the second original control signal, and the signal waveform of the first control signal is inverted to the signal waveform of the second control signal. ### Claim 10 (depends on 5) The image sensor according to claim 5, wherein the first enabling signal comprises a pulse signal. ### Claim 11 (depends on 1) The image sensor according to claim 1, wherein the pixel circuit comprises: a pixel unit; a seventh transistor, wherein a first terminal of the seventh transistor is coupled to the pixel unit, and a control terminal of the seventh transistor is coupled to the output terminal of the pixel driving circuit to receive the driving signal; an eighth transistor, wherein a control terminal of the eighth transistor is coupled to a second terminal of the seventh transistor; a ninth transistor, wherein a control terminal of the ninth transistor is coupled to a reset signal, and a second terminal of the ninth transistor is coupled to the second terminal of the seventh transistor; a tenth transistor, wherein a control terminal of the tenth transistor is coupled to a selection signal, and a first terminal of the tenth transistor is coupled to a second terminal of the eighth transistor. ### Claim 12 (depends on 11) The image sensor according to claim 11, wherein the pixel circuit further comprises: a ramp capacitor, coupled to the second terminal of the seventh transistor. ### Claim 13 (depends on 1) The image sensor according to claim 1, wherein the driving signal comprises a plurality of same driving waveforms, and the driving waveforms respectively have a second-order voltage change. ### Claim 14 (depends on 13) The image sensor according to claim 13, wherein the second-order voltage change is a sequential voltage change result of the second voltage, the ground voltage, the first voltage, the ground voltage, and the second voltage. ### Claim 15 A level shifter circuit, comprising: a first transistor, wherein a first terminal of the first transistor is coupled to a first voltage; a second transistor, wherein a first terminal of the second transistor is coupled to the first voltage, and a control terminal of the second transistor is coupled to a control terminal of the first transistor and a second terminal of the first transistor; a third transistor, wherein a first terminal of the third transistor is coupled to the second terminal of the first transistor, and a second terminal of the third transistor is coupled to a ground voltage; a fourth transistor, wherein a first terminal of the fourth transistor is coupled to a second terminal of the second transistor and an output terminal; a fifth transistor, wherein a first terminal of the fifth transistor is coupled to a second terminal of the fourth transistor, and a second terminal of the fifth transistor is coupled to a second voltage; and a sixth transistor, wherein a first terminal of the sixth transistor is coupled to the second terminal of the fourth transistor, and a second terminal of the sixth transistor is coupled to the ground voltage, wherein the output terminal is coupled to a pixel circuit, and the output terminal outputs a driving signal to the pixel circuit, wherein the first voltage is greater than the ground voltage, the second voltage is less than the ground voltage, the first transistor and the second transistor are P-type transistors, and the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are N-type transistors, wherein a control terminal of the third transistor receives a first enabling signal provided by a timing controller, and a control terminal of the fourth transistor receives a second enabling signal provided by the timing controller, wherein a signal waveform of the first enabling signal is inverted to a signal waveform of the second enabling signal, swings of the first enabling signal and the second enabling signal are from the ground voltage to a third voltage, and the third voltage is less than the first voltage. ### Claim 16 An operation method of an image sensor, wherein the image sensor comprises a timing controller, a potential dropper, a pixel circuit, and a pixel driving circuit, and the pixel driving circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor, the operation method comprising: providing a first enabling signal to a control terminal of the third transistor, and providing a second enabling signal to a control terminal of the fourth transistor by the timing controller, wherein a signal waveform of the first enabling signal is inverted to a signal waveform of the second enabling signal; providing a first control signal to a control terminal of the fifth transistor, and providing a second control signal to a control terminal of the sixth transistor by the potential dropper, wherein a signal waveform of the first control signal is inverted to a signal waveform of the second control signal; and outputting a driving signal to the pixel circuit by an output terminal coupled to a first terminal of the fourth transistor. ### Claim 17 (depends on 16) The operation method according to claim 16, further comprising: providing a first original control signal and a second original control signal to the potential dropper by the timing controller; and generating the first control signal and the second control signal according to the first original control signal and the second original control signal by the potential dropper, wherein a signal waveform of the first original control signal is inverted to a signal waveform of the second original control signal, and the signal waveform of the first control signal is inverted to the signal waveform of the second control signal. ### Claim 18 (depends on 16) The operation method according to claim 16, wherein the driving signal comprises a plurality of same driving waveforms, and the driving waveforms respectively have a second-order voltage change. ### Claim 19 (depends on 16) The operation method according to claim 16, wherein the second-order voltage change is a sequential voltage change result of the second voltage, the ground voltage, the first voltage, the ground voltage, and the second voltage.