# US 12,191,886 B2 · Recovering scrambling sequence initialization from frozen bits of an uncoded downlink control information vector > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,191,886 B2 - Document ID: US12191886B2 - Status: Granted - Kind: B2 - Application number: 18/128,707 - Filed: 2023-03-30 - Published: 2024-10-03 - Granted: 2025-01-07 - Earliest claimed: 2023-03-30 - Assignees: Viavi Solutions Inc. - Applicants: VIAVI Solutions Inc. - Inventors: Onur Dizdar; Matthew David Brown; Jiancao Hou; Chi-ming Leung; Ata Sattarzadeh Hashemi; Yi Xien Yap - Web page: https://patentgrep.com/patent/US12191886B2 ## CPC - H03M 13/2778: {Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices} - H04L 1/0057: {Block codes (H04L1/0061, H04L1/0064 take precedence)} - H03M 13/635: {Error control coding in combination with rate matching} - H04L 1/0052: {Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables} - H04L 1/0067: {Rate matching (H04L1/0013 and H04L1/08 take precedence)} - H04L 1/0071: {Use of interleaving (interleaving per se H03M13/27)} - H04L 1/0072: {Error control for data other than payload data, e.g. control data} - H03M 13/13: Linear codes - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A device may receive a downlink signal from a base station and may determine an input-output relation of polar encoding based on a vector of the downlink signal. The device may perform an interleaving operation with a matrix and the input-output relation to obtain an interleaved vector and may utilize rate matching with the interleaved vector to determine a scrambling sequence of the downlink signal. The device may utilize a reverse sequence generator with the scrambling sequence to determine a scrambling sequence initialization vector for the scrambling sequence and may perform one or more actions based on the scrambling sequence initialization vector. ## Claims ### Claim 1 A method, comprising: receiving, by a device, a downlink signal from a base station; determining, by the device, an input-output relation of polar encoding based on a vector of the downlink signal; performing, by the device, an interleaving operation with a matrix and the input-output relation to obtain an interleaved vector; utilizing, by the device, rate matching with the interleaved vector to determine a scrambling sequence of the downlink signal; utilizing, by the device, a reverse sequence generator with the scrambling sequence to determine a scrambling sequence initialization vector for the scrambling sequence; and decoding, by the device, the downlink signal based on the scrambling sequence initialization vector and without performing a descrambling operation. ### Claim 2 (depends on 1) The method of claim 1, wherein the downlink signal includes one of: a physical broadcast channel signal, or a physical downlink control channel signal. ### Claim 3 (depends on 1) The method of claim 1, wherein the vector of the downlink signal is an uncoded downlink control information vector. ### Claim 4 (depends on 1) The method of claim 1, wherein determining the input-output relation of polar encoding based on the vector of the downlink signal comprises: multiplying the vector and a generator matrix to determine the input-output relation. ### Claim 5 (depends on 1) The method of claim 1, wherein performing the interleaving operation with the matrix and the input-output relation to obtain the interleaved vector comprises: multiplying the matrix and the input-output relation to obtain the interleaved vector. ### Claim 6 (depends on 1) The method of claim 1, wherein utilizing rate matching with the interleaved vector to determine the scrambling sequence of the downlink signal comprises: determining the scrambling sequence of the downlink signal based on the interleaved vector and a variable that depends on a rate matching scheme. ### Claim 7 (depends on 1) The method of claim 1, wherein utilizing the reverse sequence generator with the scrambling sequence to determine the scrambling sequence initialization vector for the scrambling sequence comprises: multiplying the scrambling sequence and a parity check matrix to determine the scrambling sequence initialization vector. ### Claim 8 (depends on 1) The method of claim 1, wherein the downlink signal includes a signal on a physical channel that carries downlink control information. ### Claim 9 A device, comprising: one or more memories; and one or more processors, coupled to the one or more memories, configured to: receive a downlink signal from a base station; determine an input-output relation of polar encoding based on an uncoded downlink control information vector of the downlink signal; perform an interleaving operation with a matrix and the input-output relation to obtain an interleaved vector; utilize rate matching with the interleaved vector to determine a scrambling sequence of the downlink signal; utilize a reverse sequence generator with the scrambling sequence to determine a scrambling sequence initialization vector for the scrambling sequence; and decode the downlink signal based on the scrambling sequence initialization vector and without performing a descrambling operation. ### Claim 10 (depends on 9) The device of claim 9, wherein the one or more processors, to utilize the reverse sequence generator with the scrambling sequence to determine the scrambling sequence initialization vector for the scrambling sequence, are configured to: determine the scrambling sequence initialization vector based on the uncoded downlink control information vector of the downlink signal. ### Claim 11 (depends on 9) The device of claim 9, wherein the one or more processors, to utilize the reverse sequence generator with the scrambling sequence to determine the scrambling sequence initialization vector for the scrambling sequence, are configured to: process specific bits of the uncoded downlink control information vector and a parity check matrix, with a belief propagation model, to determine results; and multiply an inverse matrix and the results to determine the scrambling sequence initialization vector for the scrambling sequence. ### Claim 12 (depends on 9) The device of claim 9, wherein the downlink signal includes downlink control information. ### Claim 13 (depends on 9) The device of claim 9, wherein the downlink signal is a New Radio downlink control signal. ### Claim 14 (depends on 9) The device of claim 9, wherein the downlink signal includes a signal on a physical channel that carries downlink control information. ### Claim 15 A non-transitory computer-readable medium storing a set of instructions, the set of instructions comprising: one or more instructions that, when executed by one or more processors of a device, cause the device to: receive a downlink signal from a base station, wherein the downlink signal includes one of: a physical broadcast channel signal, or a physical downlink control channel signal; determine an input-output relation of polar encoding based on a vector of the downlink signal; perform an interleaving operation with a matrix and the input-output relation to obtain an interleaved vector; utilize rate matching with the interleaved vector to determine a scrambling sequence of the downlink signal; utilize a reverse sequence generator with the scrambling sequence to determine a scrambling sequence initialization vector for the scrambling sequence; and decode the downlink signal based on the scrambling sequence initialization vector and without performing a descrambling operation. ### Claim 16 (depends on 15) The non-transitory computer-readable medium of claim 15, wherein the one or more instructions, that cause the device to determine the input-output relation of polar encoding based on the vector of the downlink signal, cause the device to: multiply the vector and a generator matrix to determine the input-output relation. ### Claim 17 (depends on 15) The non-transitory computer-readable medium of claim 15, wherein the one or more instructions, that cause the device to perform the interleaving operation with the matrix and the input-output relation to obtain the interleaved vector, cause the device to: multiply the matrix and the input-output relation to obtain the interleaved vector. ### Claim 18 (depends on 15) The non-transitory computer-readable medium of claim 15, wherein the one or more instructions, that cause the device to utilize rate matching with the interleaved vector to determine the scrambling sequence of the downlink signal, cause the device to: determine the scrambling sequence of the downlink signal based on the interleaved vector and a variable that depends on a rate matching scheme. ### Claim 19 (depends on 15) The non-transitory computer-readable medium of claim 15, wherein the one or more instructions, that cause the device to utilize the reverse sequence generator with the scrambling sequence to determine the scrambling sequence initialization vector for the scrambling sequence, cause the device to: multiply the scrambling sequence and a parity check matrix to determine the scrambling sequence initialization vector. ### Claim 20 (depends on 15) The non-transitory computer-readable medium of claim 15, wherein the one or more instructions, that cause the device to utilize the reverse sequence generator with the scrambling sequence to determine the scrambling sequence initialization vector for the scrambling sequence, cause the device to: determine the scrambling sequence initialization vector based on the vector of the downlink signal.