# US 12,191,871 B2 · Methods and devices for TDC resolution improvement

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- Number: US 12,191,871 B2
- Document ID: US12191871B2
- Status: Granted
- Kind: B2
- Application number: 17/355,217
- Filed: 2021-06-23
- Published: 2022-09-01
- Granted: 2025-01-07
- Earliest claimed: 2021-03-01
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Evgeny Shumaker; Elan Banin; Ofir Degani; Gil Horovitz
- Web page: https://patentgrep.com/patent/US12191871B2

## CPC

- H03L 7/24: using a reference signal directly applied to the generator
- G04F 10/005: {Time-to-digital converters [TDC] (analog-to-digital converters with intermediate conversion to time or phase H03M1/50, H03M1/60)}
- H03L 7/085: concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal (H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00)
- H03L 7/0991: {the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider (H03L7/0995 takes precedence; fixed oscillators with means for selecting among various phases H03L7/0814)}
- H03L 2207/50: All digital phase-locked loop
- H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B)
- G04F: TIME-INTERVAL MEASURING (measuring pulse characteristics G01R, e.g. G01R29/02; in radar or like systems G01S)

## Abstract

A TDC circuit configured to receive a reference clock (REF) signal and a signal derived from a LO; generate a plurality of digital values indicative of a measured phase difference between the signal derived from the LO and the REF signal, wherein each of the plurality of digital values are determined from a unique set of a plurality of sets of TDC measurement component quantization levels; generate a combined series of quantization levels based on a combination of the plurality of sets of TDC measurement component quantization levels; and determine a combined digital value from the combined series of quantization levels and at least one of the plurality of digital values to generate an output of the TDC circuit. The combined series of quantization levels may be generated by summing simultaneously occurring levels of each of the plurality of sets of TDC measurement component quantization levels together.

## Claims

### Claim 1

A time to digital converter (TDC) circuit configured to:
receive a reference clock (REF) signal and a signal derived from a local oscillator (LO);
generate a plurality of digital values based on one or more TDC measurements by a single TDC measurement component, wherein the plurality of digital values are indicative of a measured phase difference between the signal derived from the LO and the REF signal, wherein each of the plurality of digital values are determined by one of a plurality of sets of TDC measurement component quantization levels;
generate a combined series of quantization levels, wherein each quantization level of the combined series of quantization levels is a sum of simultaneously-in-time occurring ones of the plurality of sets of TDC measurement component quantization levels; and
determine a combined digital value from the combined series of quantization levels and at least one of the plurality of digital values to generate an output of the TDC circuit.

### Claim 2 (depends on 1)

The TDC circuit of claim 1, wherein each of the plurality of digital values are based on a time interval between a common event in the signal derived from the LO and the REF signal.

### Claim 3 (depends on 2)

The TDC circuit of claim 2, wherein the common event is a rising edge in the signal derived from the LO and the REF signal or a falling edge in the signal derived from the LO and the REF signal.

### Claim 4 (depends on 1)

The TDC circuit of claim 1, wherein each set of the plurality of sets of TDC measurement component quantization levels has a distinct TDC measurement component quantization level grid.

### Claim 5 (depends on 1)

The TDC circuit of claim 1, wherein each quantization level in the combined series of quantization levels has a unique entry corresponding to a TDC measurement component quantization level of the plurality of sets of TDC measurement component quantization levels.

### Claim 6

A time to digital converter (TDC) circuit configured to:
receive a reference clock (REF) signal and a signal derived from a local oscillator (LO);
generate a plurality of digital values based on one or more TDC measurements by a single TDC measurement component configured, wherein the plurality of digital values are indicative of a phase difference between the signal derived from the LO and the REF signal within a single REF cycle, wherein each of the plurality of digital values are determined from a separate series of TDC quantization levels;
generate a combined series of quantization levels, wherein each quantization level of the combined series of quantization levels is a sum of simultaneously-in-time occurring ones of the separate series of TDC quantization levels; and
determine a combined digital value from the combined series of TDC quantization levels and at least one of the plurality of digital values to generate an output of the TDC circuit.

### Claim 7

A method for a time to digital converter (TDC) circuit to produce an output, the method comprising:
receiving a reference clock (REF) signal and a signal derived from a local oscillator (LO);
generating a plurality of digital values based on one or more TDC measurements by a single TDC measurement component configured, wherein the plurality of digital values are indicative of a measured phase difference between the signal derived from the LO and the REF signal, wherein each of the plurality of digital values are determined from a unique set of a plurality of sets of TDC measurement component quantization levels;
generating a combined series of quantization levels based on a combination of the plurality of sets of TDC measurement component quantization levels; and
determining a combined digital value from the combined series of quantization levels and at least one of the plurality of digital values to generate the output of the TDC circuit.

### Claim 8 (depends on 7)

The method of claim 7, wherein each of the plurality of digital values are based on a time interval between a common event in the signal derived from the LO and the REF signal.

### Claim 9 (depends on 8)

The method of claim 8, wherein the common event is a rising edge in the signal derived from the LO and the REF signal or a falling edge in the signal derived from the LO and the REF signal.

### Claim 10 (depends on 7)

The method of claim 7, wherein each set of the plurality of sets of TDC measurement component quantization levels has a distinct TDC measurement component quantization level grid.

### Claim 11 (depends on 7)

The method of claim 7, wherein each quantization level in the combined series of quantization levels has a unique entry corresponding to a TDC measurement component quantization level of the plurality of sets of TDC measurement component quantization levels.