# US 12,191,850 B2 · Isolated gate driver device for a power electrical system and corresponding power electrical system

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- Number: US 12,191,850 B2
- Document ID: US12191850B2
- Status: Granted
- Kind: B2
- Application number: 18/328,266
- Filed: 2023-06-02
- Published: 2023-09-28
- Granted: 2025-01-07
- Earliest claimed: 2021-06-30
- Assignees: STMicroelectronics S.r.l.
- Applicants: STMicroelectronics S.r.l.
- Inventors: Vittorio D′Angelo; Salvatore Cannavacciuolo; Valerio Bendotti; Paolo Selvo; Diego Alagna
- Web page: https://patentgrep.com/patent/US12191850B2

## CPC

- H03K 17/567: Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
- H03K 3/017: Adjustment of width or dutycycle of pulses (pulse width modulation H03K7/08 {; to maintain energy constant H03K3/015})
- H03K 7/08: Duration or width modulation {; Duty cycle modulation}
- H03K 17/18: Modifications for indicating state of switch
- H03K 17/687: the devices being field-effect transistors
- H03K 17/689: with galvanic isolation between the control circuit and the output circuit (H03K17/78 takes precedence)
- H03M 1/504: {using pulse width modulation}
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

In an embodiment a method includes receiving, at an input of a low-voltage section of a gate driver, a PWM control signal with a switching frequency, providing, at an output of a high-voltage section of the gat driver, a gate-driving signal as a function of the PWM control signal to a power stage, wherein the high-voltage section is galvanically isolated from the low-voltage section, receiving, at a feedback input of the high-voltage section, at least one feedback signal indicative of an operation of the power stage, converting, at an ADC module of the high-voltage section, the feedback signal into a digital data stream, providing, to the ADC module, a conversion-trigger signal designed to determine a start of a conversion for acquiring a new sample of the feedback signal and sending, via an isolation communication channel between the low-voltage section and the high-voltage section, the digital data stream to the low-voltage section.

## Claims

### Claim 1

A method comprising:
receiving, at a control input of a low-voltage section of a gate driver, a PWM control signal with a switching frequency;
providing, at an output of a high-voltage section of the gate driver, a gate-driving signal as a function of the PWM control signal to a power stage, wherein the high-voltage section is galvanically isolated from the low-voltage section, receiving, at a feedback input of the high-voltage section, at least one feedback signal indicative of an operation of the power stage;
converting, at an ADC module of the high-voltage section, the feedback signal into a digital data stream;
providing, to the ADC module, a conversion-trigger signal designed to determine a start of a conversion for acquiring a new sample of the feedback signal; and
sending, via an isolation communication channel between the low-voltage section and the high-voltage section, the digital data stream to the low-voltage section.

### Claim 2 (depends on 1)

The method according to claim 1, further comprising:
acquiring, by a conversion-control module of the high-voltage section, a signal indicative of an operating status, either ON or OFF, at the output;
providing a status signal indicative of the operating status; and
generating the conversion-trigger signal as a function of a duration of an ON interval and an OFF interval and as a function of the status signal.

### Claim 3 (depends on 2)

The method according to claim 2, further comprising:
acquiring a value of a gate-to-source voltage associated with a switch in the power stage; and
comparing the value with a threshold value so as to detect ON and OFF transitions of the switch and consequently the operating status.

### Claim 4 (depends on 3)

The method according to claim 3,
measuring the duration of the ON interval and the OFF interval associated with the operating status,
wherein a timer of the conversion-control module is reset at each transition so as to measure the duration of the ON and OFF intervals.

### Claim 5 (depends on 4)

The method according to claim 4, further comprising storing, at a first register coupled to the timer, the duration of the ON interval, and storing, at a second register coupled to the timer, the duration of the OFF interval.

### Claim 6 (depends on 2)

The method according to claim 2, further comprising determining the start of the conversion at a center of the ON interval when the duration of the ON interval is compatible with a conversion time implemented by the ADC module for acquiring the new sample of the feedback signal, or at a center of the OFF interval when the duration of the ON interval is not compatible with the conversion time.

### Claim 7 (depends on 6)

The method according to claim 6, wherein the start of the conversion is determined:
at the center of the ON interval (TON) when TON>TCONV+TGUARD,
at the center of the OFF interval (TOFF) when TON≤TCONV+TGUARD, and
wherein TGUARD is a guard-time interval, TON is the duration of the ON interval, TOFF is the duration of the OFF interval, and TCONV is the duration of the conversion time.

### Claim 8 (depends on 1)

The method according to claim 1, wherein the new sample of the feedback signal is acquired at each period of the PWM control signal.

### Claim 9 (depends on 1)

The method according to claim 1, further comprising:
receiving, at a first interface module of the high-voltage section, the digital data stream from the ADC module; and
transmitting the data stream to the communication channel.

### Claim 10 (depends on 9)

The method according to claim 9, further comprising accumulating, at a first accumulator of the first interface module, a number of samples resulting from analog-to-digital conversions by the ADC module so as to match a frequency of the PWM control signal to a different communication frequency associated with the communication channel.

### Claim 11 (depends on 10)

The method according to claim 10, further comprising resetting the first accumulator whenever a request for data arrives from the communication channel.

### Claim 12 (depends on 1)

The method according to claim 1, further comprising:
receiving, at a second interface of the low-voltage section, the digital data stream from the communication channel; and
generating, at a PWM generator, feedback output signals with an output frequency for sending the feedback output signals to a control stage.

### Claim 13 (depends on 12)

The method according to claim 12, further comprising accumulating, a second accumulator of the second interface, a number of samples transmitted over the communication channel in order to match the output frequency to a different communication frequency associated with the communication channel.

### Claim 14 (depends on 13)

The method according to claim 13, further comprising resetting the second accumulator at each new period of a feedback output signal generated by the PWM generator.

### Claim 15 (depends on 13)

The method according to claim 13, wherein the output frequency of the feedback output signals generated by the PWM generator is fixed, and wherein a corresponding duty-cycle is determined by an average content of the second accumulator.

### Claim 16 (depends on 1)

The method according to claim 1, wherein the high-voltage section and the low-voltage section comprise, respectively, a first integrity check block and a second integrity check block, which are coupled to the communication channel and are configured to check integrity of data transmitted over the communication channel.

### Claim 17 (depends on 1)

The method according to claim 1, wherein the ADC module is a sigma-delta converter with a conversion time of less than half of a switching period, given by an inverse of the switching frequency.

### Claim 18

A method comprising:
receiving, at a low-voltage section of a gate driver, a PWM control signal;
transferring the received signal to a high-voltage section of the gate driver through an isolation barrier generating a driving signal;
activating a timer when a gate-to-source voltage of a switch in a power stage based on the driving signal exceeds a pre-set threshold value;
generating, at the high-voltage section, a conversion trigger signal when the timer reaches a threshold;
acquiring, at the high-voltage section, a new sample of a feedback signal; and
adding, at the high-voltage section, the new sample to a first accumulator.

### Claim 19 (depends on 18)

The method according to claim 18, further comprising:
receiving, from the low-voltage section, a query;
validating, at an integrity check block of the high-voltage section, the query;
responding to the query with an average content of the first accumulator; and
resetting the first accumulator.

### Claim 20 (depends on 19)

The method according to claim 19, further comprising:
receiving, at the low-voltage section from the high-voltage section, data;
validating, at an integrity check block of the low-voltage section, the data; and
adding, to a second accumulator, the data.