# US 12,191,754 B2 · Method and device for suppressing narrow pulse, and bridge switching circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,191,754 B2 - Document ID: US12191754B2 - Status: Granted - Kind: B2 - Application number: 17/922,966 - Filed: 2021-12-31 - Published: 2024-07-04 - Granted: 2025-01-07 - Earliest claimed: 2021-05-28 - Assignees: Tianjin Emaging Technology Co., Ltd. - Applicants: Tianjin Emaging Technology Co., Ltd. - Inventors: Qing Wei; Shenping Hong; Honglei Sha; Tianye Yu; Aiguo Peng; Xiaohua Zhang; Shaofeng Kang; Lingsi Xia - Web page: https://patentgrep.com/patent/US12191754B2 ## CPC - H02M 1/0038: {Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control} - H02M 1/38: Means for preventing simultaneous conduction of switches - H02M 7/53873: {with digital control} - H02M 1/088: for the simultaneous control of series or parallel connected semiconductor devices - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract A method for suppressing a narrow pulse is provided. The method is applied to a bridge switch circuit having at least one bridge arm which has an upper switch transistor and a lower switch transistor, and includes: detecting whether an original comparison value of a modulated wave in a current cycle is in a preset narrow pulse interval of the upper switch transistor, and if so, determining an adjustment interval of the upper switch transistor to which the original comparison value of the modulated wave currently pertains; and adjusting the original comparison value of the modulated wave to an adjusted comparison value of the modulated wave corresponding to the adjustment interval of the upper switch transistor to which the original comparison value of the modulated wave currently pertains according to a corresponding relationship between adjustment intervals of the upper switch transistor and adjusted comparison values of the modulated wave. ## Claims ### Claim 1 A method for suppressing a narrow pulse, applied to a bridge switching circuit comprising at least one bridge arm, each of the bridge arm comprising an upper switch transistor and a lower switch transistor connected in series; the bridge switching circuit uses a comparison result of a count value of a triangular carrier and a comparison value of a modulated wave to generate a driving pulse of the upper switch transistor or the lower switch transistor; the method for suppressing the narrow pulse comprises: detecting whether an original comparison value of the modulated wave in a current cycle is within a preset narrow pulse interval of the upper switch transistor, wherein the preset narrow pulse interval of the upper switch transistor comprises a plurality of adjustment intervals of the upper switch transistor obtained by dividing a corresponding value range of the original comparison value of the modulated wave in the current cycle; determining an adjustment interval of the upper switch transistor to which the original comparison value of the modulated wave currently pertains when it is detected that the original comparison value of the modulated wave in the current cycle is within the preset narrow pulse interval of the upper switch transistor; and adjusting the original comparison value of the modulated wave to an adjusted comparison value of the modulated wave corresponding to the adjustment interval of the upper switch transistor to which the original comparison value of the modulated wave currently pertains according to a corresponding relationship between the adjustment intervals of the upper switch transistor and adjusted comparison values of the modulated wave. ### Claim 2 (depends on 1) The method for suppressing the narrow pulse according to claim 1, wherein when it is detected that the original comparison value of the modulated wave in the current cycle is not within the preset narrow pulse interval of the upper switch transistor, the method further comprises: calculating current turn-on time of the lower switch transistor according to the original comparison value of the modulated wave in the current cycle and a maximum value of the triangular carrier, and detecting whether the current turn-on time of the lower switch transistor is within a preset narrow pulse interval of the lower switch transistor, wherein the preset narrow pulse interval of the lower switch transistor comprises a plurality of adjustment intervals of the lower switch transistor obtained by dividing a corresponding value range of the turn-on time of the lower switch transistor in the current cycle; determining an adjustment interval of the lower switch transistor to which the turn-on time of the lower switch transistor currently pertains when it is detected that the current turn-on time of the lower switch transistor is within the preset narrow pulse interval of the lower switch transistor; and adjusting the original comparison value of the modulated wave to an adjusted comparison value of the modulated wave corresponding to the adjustment interval of the lower switch transistor to which the original comparison value of the modulated wave currently pertains according to a corresponding relationship between the adjustment intervals of the lower switch transistor and adjusted comparison values of the modulated wave. ### Claim 3 (depends on 2) The method for suppressing the narrow pulse according to claim 2, wherein, when the original comparison value of the modulated wave in the current cycle is temp and a maximum count value of the triangular carrier is Tprd, then the turn-on time of the lower switch transistor is 2 (Tprd−tcmp), and the preset narrow pulse interval of the lower switch transistor is (Td, Td+Tmin), where Td is the turn-on-dead-time and Tmin is a minimum turn-on pulse width of the switch transistor. ### Claim 4 (depends on 3) The method for suppressing the narrow pulse according to claim 3, wherein the preset narrow pulse interval of the lower switch transistor is divided into two adjustment intervals of the lower switch transistor; determining the adjustment interval of the lower switch transistor to which the turn-on time of the lower switch transistor currently pertains when it is detected that current turn-on time of the lower switch transistor is within the preset narrow pulse interval of the lower switch transistor comprises: determining that the turn-on time of the lower switch transistor is within the preset narrow pulse interval of the lower switch transistor when it is detected that the turn-on time of the lower switch transistor in the current cycle is within the interval (Td, Td+Tmin). ### Claim 5 (depends on 4) The method for suppressing the narrow pulse according to claim 4, wherein: adjusting the original comparison value of the modulated wave to the adjusted comparison value of the modulated wave corresponding to the adjustment interval of the lower switch transistor to which the original comparison value of the modulated wave currently pertains according to the corresponding relationship between the adjustment intervals of the lower switch transistor and the adjusted comparison values of the modulated wave comprises: when the current turn-on time of the lower switch transistor meets Td<2 (Tprd−tcmp)≤Td+0.5Tmin, adjusting the original comparison value of the modulated wave to be Tprd−0.5Td; and when the current turn-on time of the lower switch transistor meets Td+0.5Tmin<2 (Tprd−tcmp)