# US 12,191,419 B2 · Semiconductor element and semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,191,419 B2 - Document ID: US12191419B2 - Status: Granted - Kind: B2 - Application number: 17/753,585 - Filed: 2020-06-04 - Published: 2022-10-20 - Granted: 2025-01-07 - Earliest claimed: 2019-09-17 - Assignees: Sony Semiconductor Solutions Corporation - Applicants: Sony Semiconductor Solutions Corporation - Inventors: Shota Kitamura; Tetsuji Yamaguchi; Akihiro Wakahara; Keisuke Yamane - Web page: https://patentgrep.com/patent/US12191419B2 ## CPC - H10H 20/824: comprising only Group III-V materials, e.g. GaP - H10H 20/825: containing nitrogen, e.g. GaN - H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components - H04N 25/771: comprising storage means other than floating diffusion - H10F 30/222: the potential barrier being a PN heterojunction - H10F 39/021: {of image sensors having active layers comprising only Group III-V materials, e.g. GaAs, AlGaAs or InP} - H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors - H10F 39/191: {Photoconductor image sensors} - H10F 39/199: {Back-illuminated image sensors} - H10F 39/8037: {the integrated elements comprising a transistor} - H10F 77/124: comprising only Group III-V materials, e.g. GaAs - H10F 77/206: {for devices having potential barriers} - H10F 77/413: {directly associated or integrated with the devices, e.g. back reflectors (directly associated or integrated with photovoltaic cells H10F77/42)} - H10H 20/832: characterised by their material - H10H 20/833: Transparent materials - H04N 25/76: Addressed sensors, e.g. MOS or CMOS sensors - H10F 39/8053: {Colour filters} - H10F 39/8063: {Microlenses} - H10F 39/807: {Pixel isolation structures} - H10H 20/831: characterised by their shape - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract Inhibition of movement of charges in a semiconductor element formed by growing a group III-V compound semiconductor layer on a silicon substrate is prevented. The semiconductor element includes a silicon substrate, a first compound semiconductor layer, a second compound semiconductor layer, and an electrode. The first compound semiconductor layer is formed on the silicon substrate. The second compound semiconductor layer is stacked on the first compound semiconductor layer. The electrode is disposed on the silicon substrate and controls movement of charges between the silicon substrate and the second compound semiconductor layer via the first compound semiconductor layer. ## Claims ### Claim 1 A semiconductor element, comprising: a silicon substrate; a first compound semiconductor layer on a back surface of the silicon substrate; a second compound semiconductor layer on the first compound semiconductor layer; and a first electrode on a front surface of the silicon substrate, wherein the back surface of the silicon substrate is different from the front surface of the silicon substrate, and the first electrode is configured to control a movement of charges between the silicon substrate and the second compound semiconductor layer via the first compound semiconductor layer. ### Claim 2 (depends on 1) The semiconductor element according to claim 1, wherein the first compound semiconductor layer includes Gallium (Ga) and Phosphorus (P). ### Claim 3 (depends on 1) The semiconductor element according to claim 1, wherein the second compound semiconductor layer includes Gallium (Ga), Arsenic (As), Phosphorus (P), and Nitrogen (N). ### Claim 4 (depends on 1) The semiconductor element according to claim 1, wherein the first compound semiconductor layer has a film thickness of 50 nm or less. ### Claim 5 (depends on 1) The semiconductor element according to claim 1, wherein the second compound semiconductor layer has a film thickness of 3 μm or more. ### Claim 6 (depends on 1) The semiconductor element according to claim 1, further comprising a second electrode adjacent to the second compound semiconductor layer, wherein a voltage for the control of the controlling movement of the charges is applied between the first electrode and the second electrode. ### Claim 7 (depends on 6) The semiconductor element according to claim 6, wherein the second electrode is constituted by a transparent electrode. ### Claim 8 (depends on 6) The semiconductor element according to claim 6, further comprising a fixed charge film adjacent to the second compound semiconductor layer, wherein the fixed charge film includes a dielectric having fixed charges, the second compound semiconductor layer includes a charge accumulation region as the second electrode, and formation of the charge accumulation region in the second compound semiconductor layer is based on the fixed charges of the fixed charge film. ### Claim 9 (depends on 1) The semiconductor element according to claim 1, further comprising a third compound semiconductor layer on the second compound semiconductor layer, wherein the third compound semiconductor layer has a conductivity type different from that of the second compound semiconductor layer. ### Claim 10 (depends on 1) The semiconductor element according to claim 1, further comprising a separation unit that surrounds and separates the second compound semiconductor layer. ### Claim 11 (depends on 10) The semiconductor element according to claim 10, wherein the separation unit includes a dielectric having fixed charges. ### Claim 12 (depends on 10) The semiconductor element according to claim 10, wherein the separation unit includes a compound semiconductor that has a conductivity type different from that of the second compound semiconductor layer. ### Claim 13 (depends on 1) The semiconductor element according to claim 1, wherein the first electrode is further configured to control the movement of the charges in the second compound semiconductor layer, and generation of the charges in the second compound semiconductor layer is by photoelectric conversion. ### Claim 14 (depends on 13) The semiconductor element according to claim 13, wherein the first electrode is further configured to apply a control signal for the movement of the charges to the silicon substrate. ### Claim 15 (depends on 13) The semiconductor element according to claim 13, further comprising a charge holding unit in the silicon substrate, wherein the charge holding unit is configured to hold the moved charges. ### Claim 16 (depends on 15) The semiconductor element according to claim 15, further comprising an image signal generation circuit configured to generate an image signal based on the held charges. ### Claim 17 (depends on 13) The semiconductor element according to claim 13, further comprising a separation layer that surrounds and separates the silicon substrate. ### Claim 18 (depends on 1) The semiconductor element according to claim 1, wherein the first electrode is further configured to control movement of charges to be recombined for light emission in the second compound semiconductor layer. ### Claim 19 A semiconductor device, comprising: a silicon substrate; a first compound semiconductor layer on a back surface of the silicon substrate; a second compound semiconductor layer on the first compound semiconductor layer; an electrode on a front surface of the silicon substrate, wherein the back surface of the silicon substrate is different from the front surface of the silicon substrate, and the electrode is configured to control a movement of charges between the silicon substrate and the second compound semiconductor layer via the first compound semiconductor layer; and a control circuit configured to supply, to the electrode, a control signal for the control of the movement of the charges.