# US 12,191,397 B2 · Semiconductor device

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- Number: US 12,191,397 B2
- Document ID: US12191397B2
- Status: Granted
- Kind: B2
- Application number: 17/522,258
- Filed: 2021-11-09
- Published: 2022-06-02
- Granted: 2025-01-07
- Earliest claimed: 2020-12-01
- Assignees: Japan Display Inc.
- Applicants: Japan Display Inc.
- Inventors: Akihiro Hanada; Hajime Watakabe; Takuo Kaitoh; Ryo Onodera
- Web page: https://patentgrep.com/patent/US12191397B2

## CPC

- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes}
- H10D 30/6729: {characterised by the electrodes}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device includes a thin-film transistor. The thin-film transistor comprises an oxide semiconductor layer, a gate insulating layer, a gate electrode overlapped on the oxide semiconductor layer through the gate insulating layer, a source electrode in contact with the oxide semiconductor layer, a drain electrode in contact with the oxide semiconductor layer and a first metal layer in contact with the oxide semiconductor layer and disposed between the source electrode and the drain electrode at a distance from the source electrode and the drain electrode.

## Claims

### Claim 1

A semiconductor device including a thin-film transistor, the thin-film transistor comprising:
an oxide semiconductor layer;
a gate insulating layer;
a gate electrode overlapped on the oxide semiconductor layer through the gate insulating layer;
a source electrode in contact with the oxide semiconductor layer;
a drain electrode in contact with the oxide semiconductor layer; and
a first metal layer in contact with the oxide semiconductor layer and disposed between the source electrode and the drain electrode at a distance from the source electrode and the drain electrode, wherein
the oxide semiconductor layer includes a channel region and a low resistance region, the low resistance region overlaps the first metal layer, and
an oxygen concentration of the low resistance region is lower than the oxygen concentration of the channel region.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein
the distance between the first metal layer and the drain electrode is equal to or more than 1.0 μm and equal to or less than 3.0 μm.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein
the first metal layer and the drain electrode are located in the same layer as each other.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein
the first metal layer and the drain electrode are formed of the same metal material as each other.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein
the first metal layer is electrically floating.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein
the first metal layer penetrates the gate insulating layer and contacts the oxide semiconductor layer.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1, further comprising:
a second metal layer in contact with the oxide semiconductor layer and disposed between the source electrode and the first metal layer at a distance from the source electrode and the first metal layer.

### Claim 8 (depends on 7)

The semiconductor device according to claim 7, wherein
the distance between the second metal layer and the source electrode is equal to or more than 1.0 μm and equal to or less than 3.0 μm.

### Claim 9 (depends on 1)

The semiconductor device according to claim 1, wherein
the oxide semiconductor layer further includes a drain region, and the low resistance region is between the channel region and the drain region.

### Claim 10 (depends on 9)

The semiconductor device according to claim 9, wherein
a first region of the low resistance region is located between a region in contact with the first metal layer and the drain region.

### Claim 11 (depends on 10)

The semiconductor device according to claim 10, wherein
a second region of the low resistance region is located between the region in contact with the first metal layer and the channel region.

### Claim 12 (depends on 11)

The semiconductor device according to claim 11, wherein
the first region and the second region are separated from each other by the region in contact with the first metal layer.
