# US 12,191,356 B2 · Semiconductor device including silicon carbide region containing oxygen

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,191,356 B2
- Document ID: US12191356B2
- Status: Granted
- Kind: B2
- Application number: 17/447,074
- Filed: 2021-09-08
- Published: 2022-09-29
- Granted: 2025-01-07
- Earliest claimed: 2021-03-23
- Assignees: Kabushiki Kaisha Toshiba
- Applicants: Kabushiki Kaisha Toshiba
- Inventors: Tatsuo Shimizu
- Web page: https://patentgrep.com/patent/US12191356B2

## CPC

- H10D 62/307: {the doping variations being parallel to the channel lengths}
- B60L 50/64: Constructional details of batteries specially adapted for electric vehicles
- B60L 53/20: characterised by converters located in the vehicle
- H02M 7/003: {Constructional details, e.g. physical layout, assembly, wiring or busbar connections}
- H10D 12/031: {of IGBTs}
- H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes}
- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 62/107: {Buried supplementary regions, e.g. buried guard rings (multi-RESURF H10D62/111)}
- H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs}
- H10D 62/235: {of IGFETs (IGFETs having buried channels H10D30/637)}
- H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)}
- H10D 62/8325: {Silicon carbide}
- H10D 62/834: further characterised by the dopants
- H10D 64/01366: {the semiconductor being silicon carbide}
- H10P 30/204: {into Group IV semiconductors}
- H10P 30/208: {of electrically inactive species}
- B66B 11/043: {actuated by rotating motor; Details, e.g. ventilation (roping on drum, sheave, winch or pulley B66B11/0065; power supply or control B66B1/28, H02P; motor construction H02K)}
- H02P 27/06: using DC to AC converters or inverters (H02P27/05 takes precedence)
- H10D 30/658: {having trench gate electrodes}
- H10D 62/405: {Orientations of crystalline planes}
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10P 30/2042: {into crystalline silicon carbide}
- H10P 30/21: {of electrically active species}
- H10P 30/218: {characterised by the implantation in a compound semiconductor of both electrically active and inactive species in the same semiconductor region to be doped n-type or p-type}
- H10P 30/221: {characterised by the angle between the ion beam and the mask}
- H10P 30/222: {characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221)}
- H10P 30/28: characterised by an annealing step, e.g. for activation of dopants
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- B60L: PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES (arrangements or mounting of electrical propulsion units or of plural diverse prime-movers for mutual or common propulsion in vehicles B60K1/00, B60K6/20; arrangements or mounting of electrical gearing in vehicles B60K17/12, B60K17/14; preventing wheel slip by reducing power in rail vehicles B61C15/08; dynamo-electric machines H02K; control or regulation of electric motors H02P); SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES (electric coupling devices combined with mechanical couplings of vehicles B60D1/64; electric heating for vehicles B60H1/00); ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL (control or regulation of electric motors H02P); MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- B66B: ELEVATORS; ESCALATORS OR MOVING WALKWAYS ({apparatus for raising or lowering persons on theatrical stages or the like A63J5/12} ; funicular railbound systems with rigid ground-supported tracks and cable traction, e.g. cliff railways, B61B9/00; arrangements of ammunition handlers in vessels B63G3/00; hoists, lifts, or conveyors for loading or unloading in general B65G; braking or detent devices controlling normal movements of winding drums or barrels B66D; ship-lifting devices E02C; garages for many vehicles with mechanical means for lifting vehicles E04H6/12; hoists for feeding ammunition or projectiles to launching apparatus or to loading mechanisms F41A9/00)
- H02P: CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS

## Abstract

A semiconductor device of embodiments includes: a silicon carbide layer having a first face and a second face and including a first trench, a second trench having a distance of 100 nm or less from the first trench, a first silicon carbide region of n-type, a second silicon carbide region of p-type between the first trench and the second trench, a third silicon carbide region of n-type between the second silicon carbide region and the first face, a fourth silicon carbide region between the first trench and the second silicon carbide region and containing oxygen, and a fifth silicon carbide region between the second trench and the second silicon carbide region and containing oxygen; a first gate electrode in the first trench; a second gate electrode in the second trench; a first gate insulating layer; a second gate insulating layer; a first electrode; and a second electrode.

## Claims

### Claim 1

A semiconductor device, comprising:
a silicon carbide layer having a first face and a second face opposite to the first face and including:
a first trench provided on a side of the first face and extending in a first direction parallel to the first face;
a second trench provided on the side of the first face, extending in the first direction, and having a distance of 100 nm or less from the first trench in a second direction parallel to the first face and perpendicular to the first direction;
a first silicon carbide region of n-type;
a second silicon carbide region of p-type provided between the first silicon carbide region and the first face and provided between the first trench and the second trench;
a third silicon carbide region of n-type provided between the second silicon carbide region and the first face and provided between the first trench and the second trench;
a fourth silicon carbide region provided between the first trench and the second silicon carbide region and containing oxygen; and
a fifth silicon carbide region provided between the second trench and the second silicon carbide region and containing oxygen;
a first gate electrode provided in the first trench;
a second gate electrode provided in the second trench;
a first gate insulating layer provided between the first gate electrode and the silicon carbide layer;
a second gate insulating layer provided between the second gate electrode and the silicon carbide layer;
a first electrode provided on the side of the first face of the silicon carbide layer and electrically connected to the third silicon carbide region; and
a second electrode provided on a side of the second face of the silicon carbide layer,
wherein the fourth silicon carbide region contains an oxygen atom bonded to four silicon atoms, and
the fifth silicon carbide region contains an oxygen atom bonded to four silicon atoms.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein the silicon carbide layer further includes:
a sixth silicon carbide region provided between the first trench and the first silicon carbide region and containing oxygen; and
a seventh silicon carbide region provided between the second trench and the first silicon carbide region and containing oxygen.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1,
wherein an oxygen concentration in the fourth silicon carbide region is equal to or more than 1×1017 cm−3 and equal to or less than 1×1023 cm−3, and an oxygen concentration in the fifth silicon carbide region is equal to or more than 1×1017 cm−3 and equal to or less than 1×1023 cm−3.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1,
wherein a concentration of oxygen atoms bonded to four silicon atoms in the fourth silicon carbide region is higher than a concentration of oxygen atoms bonded to two silicon atoms in the fourth silicon carbide region, and
a concentration of oxygen atoms bonded to four silicon atoms in the fifth silicon carbide region is higher than a concentration of oxygen atoms bonded to two silicon atoms in the fifth silicon carbide region.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1,
wherein a concentration of oxygen atoms bonded to four silicon atoms in the fourth silicon carbide region is higher than a concentration of oxygen atoms bonded to a carbon atom in the fourth silicon carbide region, and
a concentration of oxygen atoms bonded to four silicon atoms in the fifth silicon carbide region is higher than a concentration of oxygen atoms bonded to a carbon atom in the fifth silicon carbide region.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1,
wherein the fourth silicon carbide region is p-type, and the fifth silicon carbide region is p-type.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1,
wherein a width of the first trench in the second direction is larger than a distance between the first trench and the second trench in the second direction.

### Claim 8 (depends on 1)

The semiconductor device according to claim 1, further comprising:
a first gate electrode pad provided on the side of the first face of the silicon carbide layer and electrically connected to the first gate electrode; and
a second gate electrode pad provided on the side of the first face of the silicon carbide layer and electrically connected to the second gate electrode.

### Claim 9 (depends on 1)

An inverter circuit comprising the semiconductor device according to claim 1.

### Claim 10 (depends on 1)

A drive device comprising the semiconductor device according to claim 1.

### Claim 11 (depends on 1)

A vehicle comprising the semiconductor device according to claim 1.

### Claim 12 (depends on 1)

An elevator comprising the semiconductor device according to claim 1.

### Claim 13

A semiconductor device, comprising:
a silicon carbide layer having a first face and a second face opposite to the first face and including:
a first trench provided on a side of the first face and extending in a first direction parallel to the first face;
a second trench provided on the side of the first face, extending in the first direction, and having a distance of 100 nm or less from the first trench in a second direction parallel to the first face and perpendicular to the first direction;
a first silicon carbide region of n-type;
a second silicon carbide region of p-type provided between the first silicon carbide region and the first face and provided between the first trench and the second trench;
a third silicon carbide region of n-type provided between the second silicon carbide region and the first face and provided between the first trench and the second trench;
a fourth silicon carbide region provided between the first trench and the second silicon carbide region and containing oxygen; and
a fifth silicon carbide region provided between the second trench and the second silicon carbide region and containing oxygen;
a first gate electrode provided in the first trench;
a second gate electrode provided in the second trench;
a first gate insulating layer provided between the first gate electrode and the silicon carbide layer:
a second gate insulating layer provided between the second gate electrode and the silicon carbide layer;
a first electrode provided on the side of the first face of the silicon carbide layer and electrically connected to the third silicon carbide region; and
a second electrode provided on a side of the second face of the silicon carbide layer,
wherein an oxygen concentration at a first position 20 nm away from an interface between the first gate insulating layer and the silicon carbide layer toward the silicon carbide layer is less than 1×1017 cm−3, and
an oxygen concentration at a second position 20 nm away from an interface between the second gate insulating layer and the silicon carbide layer toward the silicon carbide layer is less than 1×1017 cm−3.

### Claim 14

A semiconductor device, comprising:
a silicon carbide layer having a first face and a second face opposite to the first face and including:
a first trench provided on a side of the first face and extending in a first direction parallel to the first face;
a second trench provided on the side of the first face, extending in the first direction, and having a distance of 100 nm or less from the first trench in a second direction parallel to the first face and perpendicular to the first direction;
a first silicon carbide region of n-type;
a second silicon carbide region of p-type provided between the first silicon carbide region and the first face and provided between the first trench and the second trench;
a third silicon carbide region of n-type provided between the second silicon carbide region and the first face and provided between the first trench and the second trench;
a fourth silicon carbide region provided between the first trench and the second silicon carbide region and containing oxygen; and
a fifth silicon carbide region provided between the second trench and the second silicon carbide region and containing oxygen;
a first gate electrode provided in the first trench;
a second gate electrode provided in the second trench;
a first gate insulating layer provided between the first gate electrode and the silicon carbide layer;
a second gate insulating layer provided between the second gate electrode and the silicon carbide layer;
a first electrode provided on the side of the first face of the silicon carbide layer and electrically connected to the third silicon carbide region; and
a second electrode provided on a side of the second face of the silicon carbide layer,
wherein the fourth silicon carbide region is p-type, and the fifth silicon carbide region is p-type,
wherein the fourth silicon carbide region contains aluminum, and an oxygen concentration in the fourth silicon carbide region is higher than an aluminum concentration in the fourth silicon carbide region, and
the fifth silicon carbide region contains aluminum, and an oxygen concentration in the fifth silicon carbide region is higher than an aluminum concentration in the fifth silicon carbide region.

### Claim 15

A semiconductor device, comprising:
a silicon carbide layer having a first face and a second face opposite to the first face and including:
a first trench provided on a side of the first face and extending in a first direction parallel to the first face;
a second trench provided on the side of the first face, extending in the first direction, and having a distance of 100 nm or less from the first trench in a second direction parallel to the first face and perpendicular to the first direction;
a first silicon carbide region of n-type;
a second silicon carbide region of p-type provided between the first silicon carbide region and the first face and provided between the first trench and the second trench;
a third silicon carbide region of n-type provided between the second silicon carbide region and the first face and provided between the first trench and the second trench;
a fourth silicon carbide region provided between the first trench and the second silicon carbide region and containing oxygen; and
a fifth silicon carbide region provided between the second trench and the second silicon carbide region and containing oxygen;
a first gate electrode provided in the first trench;
a second gate electrode provided in the second trench;
a first gate insulating layer provided between the first gate electrode and the silicon carbide layer;
a second gate insulating layer provided between the second gate electrode and the silicon carbide layer;
a first electrode provided on the side of the first face of the silicon carbide layer and electrically connected to the third silicon carbide region; and
a second electrode provided on a side of the second face of the silicon carbide layer,
wherein the silicon carbide layer further includes an eighth silicon carbide region of p-type provided between the second silicon carbide region and the first face, provided between the first trench and the second trench, disposed in the first direction with respect to the third silicon carbide region, having a p-type impurity concentration higher than a p-type impurity concentration in the second silicon carbide region, and electrically connected to the first electrode.

### Claim 16

A semiconductor device, comprising:
a silicon carbide layer having a first face and a second face opposite to the first face and including:
a first trench provided on a side of the first face and extending in a first direction parallel to the first face;
a second trench provided on the side of the first face, extending in the first direction, and having a distance of 100 nm or less from the first trench in a second direction parallel to the first face and perpendicular to the first direction;
a first silicon carbide region of n-type;
a second silicon carbide region of p-type provided between the first silicon carbide region and the first face and provided between the first trench and the second trench;
a third silicon carbide region of n-type provided between the second silicon carbide region and the first face and provided between the first trench and the second trench;
a fourth silicon carbide region provided between the first trench and the second silicon carbide region and containing oxygen; and
a fifth silicon carbide region provided between the second trench and the second silicon carbide region and containing oxygen;
a first gate electrode provided in the first trench;
a second gate electrode provided in the second trench;
a first gate insulating layer provided between the first gate electrode and the silicon carbide layer;
a second gate insulating layer provided between the second gate electrode and the silicon carbide layer;
a first electrode provided on the side of the first face of the silicon carbide layer and electrically connected to the third silicon carbide region; and
a second electrode provided on a side of the second face of the silicon carbide layer,
wherein the silicon carbide layer further includes:
a sixth silicon carbide region provided between the first trench and the first silicon carbide region and containing oxygen; and
a seventh silicon carbide region provided between the second trench and the first silicon carbide region and containing oxygen,
wherein the silicon carbide layer further includes a ninth silicon carbide region provided between the first trench and the first silicon carbide region and having a p-type impurity concentration higher than a p-type impurity concentration in the second silicon carbide region, and
the sixth silicon carbide region is p-type, and the seventh silicon carbide region is n-type.

### Claim 17

A semiconductor device, comprising:
a silicon carbide layer having a first face and a second face opposite to the first face and including:
a first trench provided on a side of the first face and extending in a first direction parallel to the first face;
a second trench provided on the side of the first face, extending in the first direction, and having a distance of 100 nm or less from the first trench in a second direction parallel to the first face and perpendicular to the first direction;
a first silicon carbide region of n-type;
a second silicon carbide region of p-type provided between the first silicon carbide region and the first face and provided between the first trench and the second trench;
a third silicon carbide region of n-type provided between the second silicon carbide region and the first face and provided between the first trench and the second trench;
a fourth silicon carbide region provided between the first trench and the second silicon carbide region and containing oxygen; and
a fifth silicon carbide region provided between the second trench and the second silicon carbide region and containing oxygen;
a first gate electrode provided in the first trench;
a second gate electrode provided in the second trench;
a first gate insulating layer provided between the first gate electrode and the silicon carbide layer;
a second gate insulating layer provided between the second gate electrode and the silicon carbide layer:
a first electrode provided on the side of the first face of the silicon carbide layer and electrically connected to the third silicon carbide region; and
a second electrode provided on a side of the second face of the silicon carbide layer,
wherein the silicon carbide layer further includes:
a tenth silicon carbide region provided between the first trench and the first silicon carbide region, provided between the second trench and the first silicon carbide region, provided between the second silicon carbide region and the first silicon carbide region, in contact with the second silicon carbide region, and extending in the second direction; and
an eleventh silicon carbide region provided between the first trench and the first silicon carbide region, provided between the second trench and the first silicon carbide region, provided between the second silicon carbide region and the first silicon carbide region, in contact with the second silicon carbide region, extending in the second direction, and separated from the tenth silicon carbide region in the first direction.

### Claim 18

A semiconductor device, comprising:
a silicon carbide layer having a first face and a second face opposite to the first face and including:
a first trench provided on a side of the first face and extending in a first direction parallel to the first face;
a second trench provided on the side of the first face, extending in the first direction, and having a distance of 100 nm or less from the first trench in a second direction parallel to the first face and perpendicular to the first direction;
a first silicon carbide region of n-type;
a second silicon carbide region of p-type provided between the first silicon carbide region and the first face and provided between the first trench and the second trench;
a third silicon carbide region of n-type provided between the second silicon carbide region and the first face and provided between the first trench and the second trench;
a fourth silicon carbide region provided between the first trench and the second silicon carbide region and containing oxygen; and
a fifth silicon carbide region provided between the second trench and the second silicon carbide region and containing oxygen;
a first gate electrode provided in the first trench;
a second gate electrode provided in the second trench;
a first gate insulating layer provided between the first gate electrode and the silicon carbide layer;
a second gate insulating layer provided between the second gate electrode and the silicon carbide layer;
a first electrode provided on the side of the first face of the silicon carbide layer and electrically connected to the third silicon carbide region;
a second electrode provided on a side of the second face of the silicon carbide layer,
a first region provided between the first gate insulating layer and the fourth silicon carbide region and containing at least one element selected from a group consisting of nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), scandium (Sc), yttrium (Y), and lanthanoids (La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu); and
a second region provided between the second gate insulating layer and the fifth silicon carbide region and containing at least one element selected from a group consisting of nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), scandium (Sc), yttrium (Y), and lanthanoids (La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu).
