# US 12,191,349 B2 · Reducing off-state leakage in semiconductor devices

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- Number: US 12,191,349 B2
- Document ID: US12191349B2
- Status: Granted
- Kind: B2
- Application number: 16/649,287
- Filed: 2017-12-15
- Published: 2020-09-03
- Granted: 2025-01-07
- Earliest claimed: 2017-12-15
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Dipanjan Basu; Cory E. Weber; Justin R. Weber; Sean T. Ma; Harold W. Kennel; Seung Hoon Sung; Glenn A. Glass; Jack T. Kavalieros; Tahir Ghani
- Web page: https://patentgrep.com/patent/US12191349B2

## CPC

- H10D 30/6744: {Monocrystalline silicon}
- H10D 62/102: {Constructional design considerations for preventing surface leakage or controlling electric field concentration}
- H10D 30/019: {of FETs having stacked nanowire, nanosheet or nanoribbon channels}
- H10D 30/43: having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
- H10D 30/501: {FETs having stacked nanowire, nanosheet or nanoribbon channels}
- H10D 30/62: Fin field-effect transistors [FinFET]
- H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes}
- H10D 30/6735: {having gates fully surrounding the channels, e.g. gate-all-around}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 62/116: {adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions}
- H10D 62/121: {oriented parallel to substrates}
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 62/822: comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
- H10D 62/824: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions
- H10D 62/832: being Group IV materials comprising two or more elements, e.g. SiGe
- H10D 62/852: being Group III-V materials comprising three or more elements, e.g. AlGaN or InAsSbP
- H10D 84/834: {comprising FinFETs}
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 84/017: {Manufacturing their source or drain regions, e.g. silicided source or drain regions}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/851: {comprising IGFETs having stacked nanowire, nanosheet or nanoribbon channels}
- H10D 84/853: {comprising FinFETs}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES

## Abstract

Material systems for source region, drain region, and a semiconductor body of transistor devices in which the semiconductor body is electrically insulated from an underlying substrate are selected to reduce or eliminate a band to band tunneling (“BTBT”) effect between different energetic bands of the semiconductor body and one or both of the source region and the drain region. This can be accomplished by selecting a material for the semiconductor body with a band gap that is larger than a band gap for material(s) selected for the source region and/or drain region.

## Claims

### Claim 1

An integrated circuit device comprising:
a body above a substrate, the body having a top surface and a bottom surface opposite the top surface, the body comprising a first semiconductor material having a first band gap between a conduction band and a valence band of the first semiconductor material;
an insulation structure between the substrate and the bottom surface of the body;
a gate structure including a gate dielectric structure having a portion on the body and a portion on the insulation structure, wherein the portion of the gate dielectric structure on the insulation structure is continuous along the insulation structure beneath the bottom surface of the body, the gate structure further including a gate electrode structure on the gate dielectric structure, wherein the gate structure is completely wrapped around a channel region of the body; and
a source region and a drain region, the body between the source region and the drain region, wherein at least one of the source region and the drain region comprises a second semiconductor material having a second band gap between a conduction band and a valence band of the second semiconductor material, the second band gap less than the first band gap of the body, and wherein the insulation structure extends vertically beneath the source region and the drain region.

### Claim 2 (depends on 1)

The integrated circuit device of claim 1, wherein:
the first band gap is greater than 1.3 eV; and
the second band gap less than 0.75 eV.

### Claim 3 (depends on 1)

The integrated circuit device of claim 1, wherein:
the first band gap is from 1.3 eV to 2.2 eV; and
the second band gap is from 0.15 eV to 0.75 eV.

### Claim 4 (depends on 1)

The integrated circuit device of claim 1, wherein:
the first band gap is from 0.67 eV to 1.3 eV; and
the second band gap is less than 0.73 eV.

### Claim 5 (depends on 1)

The integrated circuit device of claim 1, wherein:
the first band gap is from 0.2 eV to 0.3 eV; and
the second band gap is less than 0.2 eV.

### Claim 6 (depends on 1)

The integrated circuit device of claim 1, wherein the body has a width of 10 nm or less.

### Claim 7 (depends on 1)

The integrated circuit device of claim 1, wherein:
the source region, the drain region, and the body comprise majority charge carriers having energies in one of the conduction band or the valence band; and
the one of the conduction band or the valence band in which the majority charge carrier have energies is overlapping between the body and at least one of the source region and the drain region.

### Claim 8 (depends on 7)

The integrated circuit device of claim 7, wherein:
the majority charge carriers are electrons; the conduction bands of the source region, the drain region, and the body have at least some overlap in energies; and
the valence band of the body does not have any overlap in energy with at least one of the source region and the drain region.

### Claim 9 (depends on 7)

The integrated circuit device of claim 7, wherein:
the majority charge carriers are holes; the valence bands of the source region, the drain region, and the body have at least some overlap in energies; and
the conduction band of the body does not have any overlap in energy with at least one of the source region and the drain region.

### Claim 10 (depends on 1)

The integrated circuit device of claim 1, wherein:
the body comprises indium and phosphorous; and
at least one of the source region and the drain region comprises indium, and arsenic.

### Claim 11 (depends on 10)

The integrated circuit device of claim 10, wherein:
the body further comprises gallium; and
at least one of the source region and the drain region further comprises at least one of gallium and antimony.

### Claim 12 (depends on 1)

The integrated circuit device of claim 1, wherein:
the body comprises indium, gallium, arsenic, and antimony; and
at least one of the source region and the drain region comprises indium and at least one of arsenic and antimony.

### Claim 13 (depends on 1)

The integrated circuit device of claim 1, wherein:
the body comprises indium, gallium, phosphorous, and antimony; and
at least one of the source region and the drain region comprises indium and at least one of arsenic and antimony.

### Claim 14 (depends on 13)

The integrated circuit device of claim 13, wherein at least one of the source region and the drain region further comprises gallium.

### Claim 15 (depends on 1)

The integrated circuit device of claim 1, wherein the body comprises antimony and at least one of aluminum and gallium.

### Claim 16 (depends on 15)

The integrated circuit device of claim 15, wherein at least one of the source region and the drain region comprises antimony and one of indium and gallium.

### Claim 17 (depends on 15)

The integrated circuit device of claim 15, wherein at least one of the source region and the drain region comprises germanium.

### Claim 18 (depends on 1)

The integrated circuit device of claim 1, wherein:
the body comprises one or both of silicon and germanium; and
at least one of the source region and the drain region comprises germanium.

### Claim 19 (depends on 1)

The integrated circuit device of claim 1, wherein a majority of the first band gap is above a Fermi level associated with an energy band of a majority charge carrier.

### Claim 20 (depends on 1)

The integrated circuit device of claim 1, wherein:
a majority charge carrier is an electron;
the valence bands of the source region, the drain region, and the body have an energy offset therebetween; and
the conduction bands of the source region, the drain region, and the body do not have an energy offset therebetween.

### Claim 21 (depends on 1)

The integrated circuit device of claim 1, wherein:
a majority charge carrier is a hole;
the valence bands of the source region, the drain region, and the body do not have an energy offset therebetween; and
the conduction bands of the source region, the drain region, and the body have an energy offset therebetween.

### Claim 22

An integrated circuit device comprising:
a nanowire comprising a first semiconductor material having a first band gap between a conduction band and a valence band of the first semiconductor material;
an insulation structure below the nanowire;
a gate structure completely wrapped around the nanowire, that gate structure including a gate dielectric structure having a portion on the nanowire and a portion on the insulation structure, wherein the portion of the gate dielectric structure on the insulation structure is continuous along the insulation structure beneath the nanowire, the gate structure further including a gate electrode structure on the gate dielectric structure; and
a source region and a drain region, the nanowire between the source region and the drain region, wherein at least one of the source region and the drain region comprises a second semiconductor material having a second band gap between a conduction band and a valence band of the second semiconductor material, the second band gap less than the first band gap of the nanowire, and wherein the insulation structure extends vertically beneath the source region and the drain region.

### Claim 23 (depends on 22)

The integrated circuit device of claim 22, wherein the first semiconductor material comprises a group III-V semiconductor material, and the second semiconductor material comprises one or both of a group IV semiconductor material and a group III-V semiconductor material.

### Claim 24

An integrated circuit device comprising:
a body having a top surface and a bottom surface opposite the top surface, the body comprising a first semiconductor material having a first band gap between a conduction band and a valence band of the first semiconductor material;
an insulation structure below the body;
a gate structure including a gate dielectric structure having a portion on the body and a portion on the insulation structure, wherein the portion of the gate dielectric structure on the insulation structure is continuous along the insulation structure beneath the body, the gate structure further including a gate electrode structure on the gate dielectric structure, wherein the gate structure is completely wrapped around a channel region of the body; and
a source region and a drain region, the body between the source region and the drain region, wherein at least one of the source region and the drain region comprises a second semiconductor material having a second band gap between a conduction band and a valence band of the second semiconductor material, the second band gap less than the first band gap of the body; wherein the first semiconductor material is indium phosphide which includes indium and phosphorus and the second semiconductor material is indium gallium arsenide which includes indium, gallium, and arsenic, or the first semiconductor material is aluminum antimonide which includes aluminum and antimony and the second semiconductor material includes germanium, and wherein the insulation structure extends vertically beneath the source region and the drain region.

### Claim 25 (depends on 24)

The integrated circuit device of claim 24, wherein the body comprises one or more nanowires, and the gate structure wraps around the one or more nanowires to provide a gate all around structure.