# US 12,191,347 B2 · High density metal insulator metal capacitor

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- Number: US 12,191,347 B2
- Document ID: US12191347B2
- Status: Granted
- Kind: B2
- Application number: 18/231,754
- Filed: 2023-08-08
- Published: 2023-11-30
- Granted: 2025-01-07
- Earliest claimed: 2020-09-15
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Wei Kai Shih; Kuo-Liang Wang
- Web page: https://patentgrep.com/patent/US12191347B2

## CPC

- H10D 1/682: {having dielectrics comprising perovskite structures}
- H10D 1/042: {using deposition processes to form electrode extensions}
- H10D 1/043: {using patterning processes to form electrode extensions, e.g. etching}
- H10D 1/68: Capacitors having no potential barriers
- H10D 1/692: {Electrodes}
- H10D 1/714: {having horizontal extensions}
- H10D 1/716: {having vertical extensions}
- H10W 20/496: {Capacitor integral with wiring layers}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Semiconductor devices and methods are disclosed herein. In one example, a disclosed semiconductor device includes: an insulation layer, a first electrode with sidewalls and a bottom surface in contact with the insulation layer; a second electrode with sidewalls and a bottom surface in contact with the insulation layer; and an insulator formed between the first electrode and the second electrode. The insulator is coupled to a sidewall of the first electrode and coupled to a sidewall of the second electrode.

## Claims

### Claim 1

A semiconductor device, comprising:
an insulation layer; and
a dielectric layer comprising:
a first electrode with sidewalls and a bottom surface in contact with the insulation layer,
a second electrode with sidewalls and a bottom surface in contact with the insulation layer, and
an insulator formed between the first electrode and the second electrode, wherein the insulator is coupled to a sidewall of the first electrode and coupled to a sidewall of the second electrode, wherein:
the first electrode is electrically connected to a first voltage,
the second electrode is electrically connected to a second voltage different from the first voltage, and wherein:
the bottom surface of the first electrode has a first shape;
the bottom surface of the second electrode has a second shape; and
the first shape and the second shape have same dimensions and a same area,
the first electrodes are electrically connected to a first voltage via the at least one metal layer;
the second electrodes are electrically connected to a second voltage via the at least one metal layer; and
the first voltage is higher than the second voltage.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the first and second shapes are rectangular shapes.

### Claim 3 (depends on 2)

The semiconductor device of claim 2, wherein:
the first shape and the second shape each have an area smaller than 25 square micrometers.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein:
each of the first and second electrodes includes a conductive material; and
the dielectric layer comprises an insulating structure formed between the first electrode and the second electrode.

### Claim 5 (depends on 4)

The semiconductor device of claim 4, wherein:
the first and second electrodes form a plurality of capacitors connected in series.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein:
each of the first electrode and the second electrode includes tungsten.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the insulation layer comprises a plurality of sub-layers.

### Claim 8 (depends on 7)

The semiconductor device of claim 7, wherein the plurality of sub-layers comprises:
at least one nitride layer; and
at least one oxide layer.

### Claim 9

A semiconductor device, comprising:
a substrate;
an insulation layer on the substrate;
a dielectric layer on the insulation layer;
a plurality of first electrodes formed within the dielectric layer; and
a plurality of second electrodes formed within the dielectric layer, wherein
the first electrodes and the second electrodes are interlaced with each other and form an electrode array extending along a first direction, and
top surfaces of the first electrodes and the second electrodes have a same shape, and wherein:
each of the first electrodes and the second electrodes includes a conductive material;
the dielectric layer comprises an insulating structure formed between the first electrodes and the second electrodes;
each of the plurality of first electrodes has sidewalls and a bottom surface in contact with the insulation layer;
each of the plurality of second electrodes has sidewalls and a bottom surface in contact with the insulation layer; and
the insulating structure is coupled to the sidewalls of the first electrodes and the second electrodes,
the first electrodes are electrically connected to a first voltage via the at least one metal layer;
the second electrodes are electrically connected to a second voltage via the at least one metal layer; and
the first voltage is higher than the second voltage.

### Claim 10 (depends on 9)

The semiconductor device of claim 9, further comprising:
at least one metal layer over the dielectric layer.

### Claim 11 (depends on 10)

The semiconductor device of claim 10, wherein:
the first voltage is a logic high voltage and the second voltage is a logic low voltage.

### Claim 12 (depends on 9)

The semiconductor device of claim 9, wherein:
bottom surfaces of each of the first electrodes has a first rectangular shape; and
bottom surfaces of each of the second electrodes has a second rectangular shape.

### Claim 13 (depends on 12)

The semiconductor device of claim 12, wherein:
the first rectangular shape and the second rectangular shape have same dimensions and a same area smaller than 25 square micrometers.

### Claim 14 (depends on 9)

The semiconductor device of claim 9, wherein:
the interlaced first and second electrodes form a plurality of capacitors connected in series; and
each of the plurality of capacitors stores electrical energy in an electric field that has a direction parallel to the substrate.

### Claim 15 (depends on 14)

The semiconductor device of claim 14, wherein:
the plurality of capacitors has an area density of at least 5 capacitors per 100 square micrometers.

### Claim 16

A method for forming a semiconductor device, comprising:
forming an insulation layer on a substrate;
depositing a dielectric layer on the insulation layer; and
forming a plurality of electrodes within the dielectric layer, wherein
the plurality of electrodes comprises first electrodes and second electrodes that are interlaced with each other and form an electrode array extending along a first direction, and
top surfaces of the plurality of electrodes have a same shape,
wherein forming the insulation layer comprises:
depositing a first oxide layer on the substrate;
depositing a nitride layer on the first oxide layer; and
depositing a second oxide layer on the nitride layer.

### Claim 17 (depends on 16)

The method of claim 16, wherein the first electrodes are electrically connected to a first voltage via at least one metal layer, the second electrodes are electrically connected to a second voltage via the at least one metal layer, and the first voltage is higher than the second voltage.

### Claim 18 (depends on 17)

The method of claim 17, wherein forming the plurality of electrodes comprises:
depositing a mask on the dielectric layer;
forming a pattern on the mask;
etching the dielectric layer based on the pattern to form a plurality of trenches; and
filling up the plurality of trenches with a conductive material to form the plurality of electrodes.

### Claim 19 (depends on 18)

The method of claim 18, wherein etching the dielectric layer comprises:
removing completely the second oxide layer at a bottom of each of the plurality of trenches; and
removing at least partially the nitride layer at the bottom of each of the plurality of trenches.

### Claim 20 (depends on 16)

The method of claim 16, further comprising:
depositing a metal layer on the first electrodes and the second electrodes;
connecting the first electrodes to a first voltage via the metal layer; and
connecting the second electrodes to a second voltage via the metal layer, wherein the first voltage is higher than the second voltage.