# US 12,191,345 B2 · Semiconductor device

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- Number: US 12,191,345 B2
- Document ID: US12191345B2
- Status: Granted
- Kind: B2
- Application number: 18/598,870
- Filed: 2024-03-07
- Published: 2024-06-27
- Granted: 2025-01-07
- Earliest claimed: 2019-06-18
- Assignees: Socionext Inc.
- Applicants: Socionext Inc.
- Inventors: Isaya Sobue; Hideyuki Komuro
- Web page: https://patentgrep.com/patent/US12191345B2

## CPC

- H10D 1/47: Resistors having no potential barriers
- H10D 84/811: {Combinations of field-effect devices and one or more diodes, capacitors or resistors}
- H10D 84/817: {Combinations of field-effect devices and resistors only}
- H10D 88/00: Three-dimensional [3D] integrated devices
- H10D 84/85: Complementary IGFETs, e.g. CMOS
- H10D 84/853: {comprising FinFETs}
- H10W 20/427: {Power or ground buses}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device includes a substrate; a first semiconductor region formed over the substrate; a second semiconductor region formed over the substrate, and electrically connected to the first semiconductor region; a third semiconductor region formed over the substrate, and positioned between the first semiconductor region and the second semiconductor region; a fourth semiconductor region formed over the first semiconductor region; a fifth semiconductor region formed over the second semiconductor region, and electrically connected to the fourth semiconductor region; a sixth semiconductor region formed over the third semiconductor region, and positioned between the fourth semiconductor region and the fifth semiconductor region; and wires formed between the first semiconductor region and the second semiconductor region, and between the fourth semiconductor region and the fifth semiconductor region, to cover the third semiconductor region and the sixth semiconductor region, the wires including conductors.

## Claims

### Claim 1

A semiconductor device comprising:
a substrate;
a first semiconductor region formed over the substrate;
a second semiconductor region formed over the substrate, and electrically connected to the first semiconductor region;
a third semiconductor region formed over the substrate, and positioned between the first semiconductor region and the second semiconductor region;
a fourth semiconductor region formed over the first semiconductor region;
a fifth semiconductor region formed over the second semiconductor region, and electrically connected to the fourth semiconductor region;
a sixth semiconductor region formed over the third semiconductor region, and positioned between the fourth semiconductor region and the fifth semiconductor region; and
wires formed between the first semiconductor region and the second semiconductor region, and between the fourth semiconductor region and the fifth semiconductor region, to cover the third semiconductor region and the sixth semiconductor region, the wires including conductors, wherein
a part of the wires is located between the substrate and the third semiconductor region.

### Claim 2 (depends on 1)

The semiconductor device as claimed in claim 1,
wherein the wires extend in a direction perpendicular to a direction in plan view, in which the first semiconductor region and the second semiconductor region are arranged.

### Claim 3 (depends on 1)

The semiconductor device as claimed in claim 1, further comprising:
a first power line to which the first semiconductor region and the second semiconductor region are electrically connected; and
a second power line to which the fourth semiconductor region and the fifth semiconductor region are electrically connected,
wherein the first semiconductor region and the second semiconductor region have a first conductivity type, and
wherein the fourth semiconductor region and the fifth semiconductor region have a second conductivity type different from the first conductivity type.

### Claim 4 (depends on 3)

The semiconductor device as claimed in claim 3,
wherein in a case where a ground potential is supplied to the first power line and a power supply potential higher than the ground potential is supplied to the second power line, the first conductivity type is an N type, and the second conductivity type is a P type, and wherein in a case where a ground potential is supplied to the second power line and a power supply potential higher than the ground potential is supplied to the first power line, the second conductivity type is an N type,
and the first conductivity type is a P type.

### Claim 5 (depends on 3)

The semiconductor device as claimed in claim 3, wherein in a case where a ground potential is supplied to the first power line and a power supply potential higher than the ground potential is supplied to the second power line, the first conductivity type is a P type, and the second conductivity type is an N type, and
wherein in a case where a ground potential is supplied to the second power line and a power supply potential higher than the ground potential is supplied to the first power line, the second conductivity type is a P type, and the first conductivity type is an N type.

### Claim 6 (depends on 3)

The semiconductor device as claimed in claim 3, wherein the first power line and the second power line are formed in the substrate.

### Claim 7 (depends on 3)

The semiconductor device as claimed in claim 3, further comprising:
a first local wire electrically connecting the first power line and the first semiconductor region;
a second local wire electrically connecting the first power line and the second semiconductor region;
a third local wire electrically connecting the second power line and the fourth semiconductor region; and
a fourth local wire electrically connecting the second power line and the fifth semiconductor region.

### Claim 8 (depends on 1)

The semiconductor device as claimed in claim 1,
wherein the wires are electrically connected to the first semiconductor region, the second semiconductor region, the fourth semiconductor region, and the fifth semiconductor region.

### Claim 9 (depends on 8)

The semiconductor device as claimed in claim 8, further comprising:
a first inverter electrically connected to one end of the wires; and
a second inverter electrically connected to another end of the wire.

### Claim 10 (depends on 1)

The semiconductor device as claimed in claim 1, further comprising:
a plurality of basic structures each including the first semiconductor region, the second semiconductor region, the third semiconductor region, the fourth semiconductor region, the fifth semiconductor region, the sixth semiconductor region, and the conductors,
wherein the plurality of basic structures are arranged side by side in a direction perpendicular to a direction in which the wires extend in plan view, and
wherein the wires are electrically connected in series between adjacent basic structures among the plurality of basic structures.

### Claim 11 (depends on 1)

The semiconductor device as claim 1, further comprising:
a first insulating film formed between the substrate and the first semiconductor region; and
a second insulating film formed between the substrate and the second semiconductor region.

### Claim 12

A semiconductor device comprising:
a substrate;
a first semiconductor region and a second semiconductor region formed over the substrate;
a third semiconductor region formed over the first semiconductor region;
a fourth semiconductor region formed over the second semiconductor region; and
wires formed between the first semiconductor region and the second semiconductor region, and between the third semiconductor region and the fourth semiconductor region, the wires including conductors,
wherein the first semiconductor region, the second semiconductor region, the third semiconductor region, and the fourth semiconductor region are electrically floating;
a first insulating film formed between the substrate and the first semiconductor region; and
a second insulating film formed between the substrate and the second semiconductor region.

### Claim 13 (depends on 12)

The semiconductor device as claimed in claim 12, wherein a current flows in the wires in a direction perpendicular to a direction in which the first semiconductor region and the second semiconductor region are arranged.

### Claim 14 (depends on 12)

The semiconductor device as claimed in claim 12, further comprising:
a plurality of basic structures each including the first semiconductor region, the second semiconductor region, the third semiconductor region, the fourth semi-conductor region, and the conductors,
wherein the plurality of basic structures are arranged side by side in a direction perpendicular to a direction in which the conductors extend, and
wherein the conductors are electrically connected in series between adjacent basic structures among the plurality of basic structures.