# US 12,191,337 B2 · Imaging unit, method for manufacturing the same, and electronic apparatus

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- Number: US 12,191,337 B2
- Document ID: US12191337B2
- Status: Granted
- Kind: B2
- Application number: 18/060,216
- Filed: 2022-11-30
- Published: 2023-04-06
- Granted: 2025-01-07
- Earliest claimed: 2018-04-09
- Assignees: Sony Semiconductor Solutions Corporation
- Applicants: Sony Semiconductor Solutions Corporation
- Inventors: Kenya Nishio; Suguru Saito
- Web page: https://patentgrep.com/patent/US12191337B2

## CPC

- H10F 39/809: {of hybrid image sensors}
- H10F 39/018: {of hybrid image sensors}
- H10F 39/811: {Interconnections}
- H10W 90/00: Package configurations
- H10W 99/00: Subject matter not provided for in other groups of this subclass
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 90/732: {between stacked chips}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Provided is an imaging unit more efficiently manufacturable with high dimensional precision. The imaging unit includes: a sensor board including an imaging device, in which the imaging device has a plurality of pixels and allows generation of a pixel signal by receiving outside light in each of the plurality of pixels; a bonding layer including an inorganic insulating material; and a circuit board including a circuit chip and an organic insulating layer, in which a circuit chip has a signal processing circuit that performs signal processing for the pixel signal and is bonded to the sensor board through the bonding layer, and the organic insulating layer covers a vicinity of the circuit chip.

## Claims

### Claim 1

An imaging device, comprising:
an upper section that includes a plurality of pixels; and
a lower section that includes a logic chip, a memory chip, and an organic insulating layer, wherein
the logic chip is bonded and electrically connected to the upper section,
the memory chip is bonded and electrically connected to the upper section, and
the logic chip and the memory chip are covered by the organic insulating layer.

### Claim 2 (depends on 1)

The imaging device according to claim 1, wherein an area of the upper section is greater than an area of the logic chip.

### Claim 3 (depends on 1)

The imaging device according to claim 1, wherein an area of the upper section is greater than an area of the memory chip.

### Claim 4 (depends on 1)

The imaging device according to claim 1, wherein an area of the logic chip is greater than an area of the memory chip.

### Claim 5 (depends on 1)

The imaging device according to claim 1, wherein a portion of the organic insulating layer is between the logic chip and the memory chip in a cross-sectional view.

### Claim 6 (depends on 1)

The imaging device according to claim 1, wherein the organic insulating layer is formed by a coating method.

### Claim 7 (depends on 1)

The imaging device according to claim 1, wherein the organic insulating layer includes a heat-resistant resin.

### Claim 8 (depends on 1)

The imaging device according to claim 1, wherein
the lower section further includes a support substrate, the support substrate is adjacent to a side opposite to the upper section when viewed from the logic chip,
the organic insulating layer is provided to allow the organic insulating layer to cover a vicinity of the logic chip above the support substrate, and
a height position of an upper surface of the organic insulating layer is lower than a height position of an upper surface of the logic chip.

### Claim 9 (depends on 1)

The imaging device according to claim 1, wherein the organic insulating layer has a thickness that is maximum at a position in contact with an edge surface of the logic chip and that is decreased with an increasing distance from the edge surface of the logic chip.

### Claim 10

An electronic apparatus including an imaging device, wherein the imaging device comprises:
an upper section that includes a plurality of pixels; and
a lower section including a logic chip, a memory chip, and an organic insulating layer, wherein
the logic chip is bonded and electrically connected to the upper section,
the memory chip is bonded and electrically connected to the upper section, and
the logic chip and the memory chip are covered by the organic insulating layer.