# US 12,191,321 B2 · Array substrate fabricating method

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- Number: US 12,191,321 B2
- Document ID: US12191321B2
- Status: Granted
- Kind: B2
- Application number: 17/858,105
- Filed: 2022-07-06
- Published: 2022-10-27
- Granted: 2025-01-07
- Earliest claimed: 2019-08-08
- Applicants: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Inventors: Xingyu Zhou
- Web page: https://patentgrep.com/patent/US12191321B2

## CPC

- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/60: wherein the TFTs are in active matrices
- H10D 30/6723: {having light shields}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 86/021: {of multiple TFTs}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors}
- H10K 59/1216: {the pixel elements being capacitors}
- H10K 59/124: Insulating layers formed between TFT elements and OLED elements
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A method of fabricating an array substrate is provided. The array substrate includes a display region and a non-display region. The array substrate further includes a substrate, a first transparent layer disposed on the substrate corresponding to the display region, an interlayer insulating layer disposed on the substrate, and a second transparent layer disposed on the interlayer insulating layer.

## Claims

### Claim 1

A method of fabricating an array substrate, the array substrate comprising a display region and a non-display region, wherein the method comprises steps of:
providing a substrate;
depositing an oxide layer on the substrate and patterning the oxide layer to form an active layer and a first transparent layer disposed in a same layer, wherein the first transparent layer is disposed on the substrate corresponding to the display region;
forming a gate insulating layer on the active layer;
depositing a layer of metal on the gate insulating layer to form a gate layer;
depositing and forming an interlayer insulating layer, the active layer, the gate insulating layer, the gate layer, and the first transparent layer on the substrate, and forming at least two first contact holes on the interlayer insulating layer;
depositing a composite metal layer on the interlayer insulating layer, the composite metal layer comprising a second transparent layer and a metal layer, and etching away the metal layer of the composite metal layer positioned in the display region and retaining the second transparent layer;
depositing a passivation layer on the interlayer insulating layer and
the composite metal layer;
coating a photoresist layer on the passivation layer to form a planarization layer;
forming a second contact hole by photolithography of the passivation layer and the planarization layer; and
forming a pixel electrode layer on the planarization layer connected to the metal layer through the second contact hole.

### Claim 2 (depends on 1)

The method of fabricating the array substrate according to claim 1, wherein in the step of providing the substrate, the method further comprises:
providing a glass substrate;
depositing a layer of metal on the glass substrate and patterning the layer of metal to form a light-shielding layer; and
depositing a buffer layer on the light-shielding layer and the glass substrate.

### Claim 3 (depends on 1)

The method of fabricating the array substrate according to claim 1, further comprising forming a pixel definition layer on the planarization layer and the pixel electrode layer after the step of forming the pixel electrode layer.