# US 12,191,302 B2 · III-nitride device

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,191,302 B2
- Document ID: US12191302B2
- Status: Granted
- Kind: B2
- Application number: 17/357,000
- Filed: 2021-06-24
- Published: 2021-10-14
- Granted: 2025-01-07
- Earliest claimed: 2007-07-17
- Assignees: Infineon Technologies Americas Corp.
- Applicants: Infineon Technologies Americas Corp.
- Inventors: Michael A. Briere
- Web page: https://patentgrep.com/patent/US12191302B2

## CPC

- H10D 84/40: characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 62/405: {Orientations of crystalline planes}
- H10D 64/254: {for lateral devices wherein the source or drain electrodes extend entirely through the semiconductor bodies, e.g. via-holes for back side contacts}
- H10D 64/411: {for FETs}
- H10D 84/08: using combinations of technologies, e.g. using both Si and SiC technologies or using both Si and Group III-V technologies
- H10D 88/00: Three-dimensional [3D] integrated devices
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

An integrated semiconductor device includes a silicon body that includes <111> single crystal silicon, a semiconductor device that is disposed within the silicon body, a III-nitride body disposed on the silicon body, and a III-nitride device that is disposed within the III-nitride body, wherein the semiconductor device is operatively coupled to the III-nitride device.

## Claims

### Claim 1

An integrated semiconductor device comprising:
a silicon body that comprises <111> single crystal silicon;
a semiconductor device that is disposed within the silicon body;
a III-nitride body disposed on the silicon body; and
a III-nitride device that is disposed within the III-nitride body;
wherein the semiconductor device is operatively coupled to the III-nitride device.

### Claim 2 (depends on 1)

The integrated semiconductor device of claim 1, wherein the silicon body comprises a first silicon body, a second silicon body and an insulation body interposed between the first silicon body and the second silicon body, and the second silicon body provides an upper surface of the silicon body that interfaces with a lower surface of the III-nitride body.

### Claim 3 (depends on 2)

The integrated semiconductor device of claim 2, wherein the second silicon body is a <111> single crystal silicon body, and wherein the semiconductor device is disposed within the second silicon body.

### Claim 4 (depends on 3)

The integrated semiconductor device of claim 3, wherein the first silicon body is a <111> single crystal silicon body.

### Claim 5 (depends on 3)

The integrated semiconductor device of claim 3, wherein the first silicon body is a <100> single crystal silicon body.

### Claim 6 (depends on 1)

The integrated semiconductor device of claim 1, wherein the semiconductor device extends to the upper surface of the silicon body.

### Claim 7 (depends on 1)

The integrated semiconductor device of claim 1, wherein the III-nitride body comprises a heterojunction between a first III-nitride layer and a second III-nitride layer having a different bandgap as the first III-nitride layer.

### Claim 8 (depends on 7)

The integrated semiconductor device of claim 7, wherein the III-nitride device is a high electron mobility transistor that comprises first and second power electrodes coupled to a two dimensional electron gas through the second III-nitride layer and a gate electrode disposed laterally between the first and second power electrodes.

### Claim 9 (depends on 8)

The integrated semiconductor device of claim 8, wherein the semiconductor device is disposed underneath the high electron mobility transistor, and wherein the semiconductor device is electrically connected to the high electron mobility transistor by a via that extends from the III-nitride device to an upper surface of the silicon body that is opposite from the silicon body.

### Claim 10 (depends on 8)

The integrated semiconductor device of claim 8, wherein the semiconductor device is at least partially disposed in a portion of silicon body that is laterally offset from the high electron mobility transistor.

### Claim 11 (depends on 10)

The integrated semiconductor device of claim 10, wherein the portion of silicon body that is laterally offset from the high electron mobility transistor is not covered by the III-nitride body.