Multi-chip package with recessed memory

A method comprising:

• providing a substrate with a top surface and a bottom surface, wherein the substrate further comprises:
• forming a plurality of metallization layers on a substrate core layer as the top and bottom surfaces of the substrate, and forming a plurality of interconnect vias in the substrate, and forming a substrate recess in the bottom surface of the substrate;
• depositing a mold material in the substrate recess and on the bottom surface of the substrate and selectively removing the mold material from the bottom surface of the substrate to form a mold material step overlapping the bottom surface of the substrate adjacent to the substrate recess;
• positioning a first device positioned over the top surface of the substrate, wherein the first device at least partially overlaps the substrate recess and positioning a second device in the substrate recess;
• and
• coupling the first and second devices to at least one of the plurality interconnect vias to provide a signal connection therebetween.

A computer device comprising:

• a printed circuit board;
• a semiconductor package, wherein the semiconductor package further comprises:
• a substrate with a top surface and a bottom surface;
• a substrate recess in the bottom surface of the substrate;
• a first device positioned over the top surface of the substrate, wherein the first device at least partially overlaps the substrate recess;
• a mold material in the substrate recess, the mold material overlapping the bottom surface of the substrate adjacent to the substrate recess;
• a mold recess in the mold material in the substrate recess;
• a second device positioned in the mold recess, wherein the first device is positioned to at least partially overlaps the second device;
• and
• a plurality of interconnect vias in the substrate, wherein at least one of the plurality interconnect vias is coupled to the first and second devices to provide a direct signal connection therebetween.