# US 12,191,268 B1 · Integrated circuit packages having stress-relieving features > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,191,268 B1 - Document ID: US12191268B1 - Status: Granted - Kind: B1 - Application number: 18/778,322 - Filed: 2024-07-19 - Granted: 2025-01-07 - Earliest claimed: 2024-07-19 - Assignees: Apogee Semiconductor, Inc. - Applicants: Apogee Semiconductor, Inc. - Inventors: David A. Grant; Abhijeet Ghoshal - Web page: https://patentgrep.com/patent/US12191268B1 ## CPC - H10W 20/42: Vias, e.g. via plugs - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10W 70/611: {for connecting multiple chips together} - H10W 70/685: comprising multiple insulating layers - H10W 72/29: Bond pads specially adapted therefor - H10W 72/921: {Structures or relative sizes of bond pads} - H10W 72/932: {Plan-view shape, i.e. in top view} - H10W 72/936: {Multiple bond pads having different shapes} - H10W 72/967: {Multiple bond pads having different functions} - H10W 90/00: Package configurations - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract Expansion compensating structures are formed in redistribution layers of a wafer-level chip-scale integrated circuit package (WLCSP) or other IC package having a low-expansion substrate. The structures include micromechanical actuators designed and oriented to move solder bumps attached to them in the same direction and distance as a function of temperature as do pads to which they may be connected on a higher-expansion substrate such as a printed circuit board. Expansion compensated IC packages incorporating these expansion compensating structures are provided, as well as expansion compensated assemblies containing one or more of these IC packages. Methods of fabricating expansion compensated IC packages requiring minimal changes to existing commercial WLCSP fabrication processes are also provided. These devices and methods result in assemblies having improved board-level reliability during thermal cycling, and allow the use of larger IC die sizes in WLCSP technology. ## Claims ### Claim 1 An expansion compensating structure in an integrated circuit package, the package having a package substrate and at least one redistribution layer substantially parallel to a first surface of the package substrate, comprising: an anchor rigidly attached to the package substrate; a bump pad formed in the at least one redistribution layer; and a cascaded chevron actuator formed in the at least one redistribution layer, connected between the anchor and the bump pad, and configured to move the bump pad approximately along a line lying in a plane parallel to the first surface of the package substrate by a predetermined displacement for a given change in a temperature of the package. ### Claim 2 (depends on 1) The expansion compensating structure of claim 1, further comprising a handle portion connected between the actuator and the bump pad. ### Claim 3 (depends on 1) The expansion compensating structure of claim 1, further comprising a compliant link connected between the actuator and the bump pad. ### Claim 4 (depends on 1) The expansion compensating structure of claim 1, wherein the package substrate is made of silicon. ### Claim 5 (depends on 1) The expansion compensating structure of claim 1, wherein the package substrate comprises a substrate of an integrated circuit. ### Claim 6 (depends on 1) The expansion compensating structure of claim 1, wherein a beam of the actuator further comprises a plurality of narrowed sections separated by at least one wide section. ### Claim 7 (depends on 1) The expansion compensating structure of claim 1, wherein the actuator further comprises a plurality of chevron structures configured so as to act together in parallel. ### Claim 8 (depends on 1) The expansion compensating structure of claim 1, wherein the actuator comprises a plurality of actuator layers formed in a plurality of redistribution layers, whereby a thickness of the actuator is increased to stiffen the actuator against out-of-plane buckling. ### Claim 9 (depends on 8) The expansion compensating structure of claim 8, further comprising at least one tie via connecting at least two of the plurality of actuator layers. ### Claim 10 (depends on 9) The expansion compensating structure of claim 9, wherein a beam of the actuator further comprises a plurality of narrowed sections separated by at least one wide section, and a tie via is located in a wide section. ### Claim 11 An expansion compensated package for integrated circuits comprising: a package substrate having a first coefficient of thermal expansion and a first surface with a neutral point; at least one redistribution layer substantially parallel to the first surface of the package substrate; and a plurality of expansion compensating structures, each expansion compensating structure comprising an anchor rigidly attached to the package substrate, a bump pad formed in the at least one redistribution layer, and a cascaded chevron actuator formed in the at least one redistribution layer, connected between the anchor and the bump pad, and configured to move the bump pad approximately along a line lying in a plane parallel to the first surface of the package substrate by a predetermined displacement for a given change in a temperature of the package, the expansion compensating structures placed and oriented so as to position the bump pads in a predetermined pattern at a first temperature, with the actuators further configured to move the bump pads radially outward from the neutral point at a temperature greater than the first temperature, whereby the expansion compensated package may be attached at the bump pads to a higher-level interconnect having a second coefficient of thermal expansion greater than the first coefficient of thermal expansion, and the radial motion of the bump pads due to the actuators compensates for a difference between the first and second coefficients of thermal expansion. ### Claim 12 (depends on 11) The expansion compensated package of claim 11, wherein the package substrate is made of silicon. ### Claim 13 (depends on 11) The expansion compensated package of claim 11, wherein the package substrate comprises a substrate of an integrated circuit. ### Claim 14 (depends on 11) The expansion compensated package of claim 11, wherein the package substrate comprises an interposer. ### Claim 15 (depends on 11) The expansion compensated package of claim 11, wherein the displacement of each bump pad from the predetermined pattern is approximately proportional to a distance of the bump pad from the neutral point. ### Claim 16 (depends on 11) The expansion compensated package of claim 11, further comprising at least one bump pad that is not moved by an actuator. ### Claim 17 (depends on 11) The expansion compensated package of claim 11, wherein the bump pads comprise lands in a land grid array. ### Claim 18 (depends on 11) The expansion compensated package of claim 11, further comprising a plurality of solder bumps, each attached to a bump pad. ### Claim 19 An expansion compensated assembly comprising: at least one expansion compensated IC package, each package comprising a package substrate having a first coefficient of thermal expansion and a first surface with a neutral point, at least one redistribution layer substantially parallel to the first surface of the package substrate, and a plurality of expansion compensating structures formed in the at least one redistribution layer, each expansion compensating structure comprising an anchor rigidly attached to the package substrate, a bump pad formed in the at least one redistribution layer, and a cascaded chevron actuator formed in the at least one redistribution layer, connected between the anchor and the bump pad, and configured to move the bump pad approximately along a line lying in a plane parallel to the first surface of the package substrate by a predetermined displacement for a given change in a temperature of the package, the expansion compensating structures placed and oriented so as to position the bump pads in a predetermined pattern at a first temperature, with the actuators further configured to move the bump pads radially outward from the neutral point at a temperature greater than the first temperature; and a higher-level interconnect having a second coefficient of thermal expansion higher than the first coefficient of thermal expansion, the at least one expansion compensated IC package connected to the higher-level interconnect at a plurality of connection locations corresponding to positions of the bump pads at the first temperature, whereby the radial motion of the bump pads due to the actuators compensates for a difference between the first and second coefficients of thermal expansion, reducing a stress at the plurality of connection locations. ### Claim 20 (depends on 19) The expansion compensated assembly of claim 19, further comprising a plurality of solder balls attached to the higher-level interconnect, whereby the expansion compensated assembly can be connected to another interconnect structure. ### Claim 21 (depends on 19) The expansion compensated assembly of claim 19, wherein the expansion compensated IC package comprises an interposer.