# US 12,191,255 B2 · Interconnect substrate having groove around pad

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- Number: US 12,191,255 B2
- Document ID: US12191255B2
- Status: Granted
- Kind: B2
- Application number: 18/046,557
- Filed: 2022-10-14
- Published: 2023-04-20
- Granted: 2025-01-07
- Earliest claimed: 2021-10-19
- Assignees: Shinko Electric Industries Co., Ltd.
- Applicants: Shinko Electric Industries Co., Ltd.
- Inventors: Hikaru Tanaka; Takashi Kasuga; Tomoyuki Shimodaira; Hitoshi Kondo
- Web page: https://patentgrep.com/patent/US12191255B2

## CPC

- H10W 20/48: Insulating materials thereof
- H10W 70/68: Shapes or dispositions thereof
- H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W 20/42: Vias, e.g. via plugs
- H10W 20/4421: {the principal metal being copper}
- H10W 20/4432: {the principal metal being a noble metal, e.g. gold}
- H10W 70/685: comprising multiple insulating layers
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An interconnect substrate includes a pad for external connection and an insulating layer, wherein a portion of a lower surface of the pad is covered with the insulating layer, wherein an upper surface of the pad is situated at a lower position than an upper surface of the insulating layer, and wherein a groove whose bottom surface is formed by the insulating layer is formed around the pad in a plan view, and has an opening on an upper surface side of the insulating layer.

## Claims

### Claim 1

An interconnect substrate, comprising:
a pad for external connection, the pad having an entirely planar shape; and
an insulating layer,
wherein a portion of a lower surface of the pad is in direct contact with the insulating layer,
wherein an upper surface of the pad is situated at a lower position than an upper surface of the insulating layer,
wherein a groove whose bottom surface is formed by the insulating layer completely surrounds the pad in a plan view, and has an opening on an upper surface side of the insulating layer,
wherein a bottom surface of the groove is at a lower position than the lower surface of the pad, and
wherein a surface of the insulating layer under the pad, which surface is in direct contact with the pad, is at a higher position than the bottom surface of the groove.

### Claim 2 (depends on 1)

The interconnect substrate as claimed in claim 1, wherein a side surface of the pad is exposed from the insulating layer.

### Claim 3 (depends on 1)

The interconnect substrate as claimed in claim 1, wherein the insulating layer has a covering portion that covers an entire side surface of the pad and that is situated between the side surface of the pad and the bottom surface of the groove in a plan view.

### Claim 4 (depends on 1)

The interconnect substrate as claimed in claim 1, wherein the pad has a laminated structure in which a lowermost layer in contact with the insulating layer is a copper layer, and an uppermost layer is a gold layer.

### Claim 5 (depends on 1)

The interconnect substrate as claimed in claim 1, wherein the pad has a single-layer structure made of a copper layer, and an organic film is formed on a surface of the pad exposed from the insulating layer.

### Claim 6

An interconnect substrate, comprising:
a pad for external connection, the pad having an entirely planar shape; and
an insulating layer,
wherein a portion of a lower surface of the pad is covered with the insulating layer,
wherein an upper surface of the pad is situated at a lower position than an upper surface of the insulating layer,
wherein a groove whose bottom surface is formed by the insulating layer completely surrounds the pad in a plan view, and has an opening on an upper surface side of the insulating layer,
wherein a bottom surface of the groove is at a lower position than the lower surface of the pad,
wherein the pad has a single-layer structure made of a copper layer, and an organic film is formed on a surface of the pad exposed from the insulating layer, and
wherein a surface of the insulating layer covering the lower surface of the pad extends to form an extending portion extending between a side surface of the pad and the bottom surface of the groove in a plan view, and the extending portion is at a higher position than the bottom surface of the groove.

### Claim 7 (depends on 1)

The interconnect substrate as claimed in claim 1, comprising a plurality of said pads, wherein a plurality of said grooves are each situated around a respective one of the pads, and
wherein the grooves include adjacent grooves situated around adjacent pads, and the adjacent grooves communicate with each other.

### Claim 8 (depends on 1)

The interconnect substrate as claimed in claim 1, further comprising an interconnect layer formed on a lower surface of the insulating layer, and the interconnect layer includes a via interconnect extending through the insulating layer and touching the lower surface of the pad.

### Claim 9 (depends on 1)

The interconnect substrate as claimed in claim 1, wherein a side surface of the groove extends straight from the bottom surface of the groove to the upper surface of the insulating layer.