# US 12,191,240 B2 · Hybrid glass core for wafer level and panel level packaging applications

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- Number: US 12,191,240 B2
- Document ID: US12191240B2
- Status: Granted
- Kind: B2
- Application number: 16/539,254
- Filed: 2019-08-13
- Published: 2021-02-18
- Granted: 2025-01-07
- Earliest claimed: 2019-08-13
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Jieying Kong; Srinivas Pietambaram; Gang Duan
- Web page: https://patentgrep.com/patent/US12191240B2

## CPC

- H10W 70/692: Ceramics or glasses
- H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs}
- H10W 44/501: {Inductive arrangements (H10W44/20 takes precedence)}
- H10W 70/635: {Through-vias}
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 70/685: comprising multiple insulating layers
- H10W 70/69: Insulating materials thereof
- H10W 72/07236: {Soldering or alloying}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Embodiments disclosed herein include hybrid cores for electronic packaging applications. In an embodiment, a package substrate comprises a plurality of glass layers and a plurality of dielectric layers. In an embodiment, the glass layers alternate with the dielectric layers. In an embodiment, a through-hole through the plurality of glass layers and the plurality of dielectric layers is provided. In an embodiment a conductive through-hole via is disposed in the through-hole.

## Claims

### Claim 1

A package substrate, comprising:
a plurality of glass layers, wherein one of the plurality of glass layers has a vertical sidewall that is recessed relative to a corresponding vertical sidewall of an overlying one of the plurality of glass layers and relative to a corresponding vertical sidewall of an underlying one of the plurality of glass layers;
a plurality of dielectric layers, wherein the glass layers alternate with the dielectric layers, and wherein each of the plurality of glass layers has a thickness greater than a thickness of each one of the plurality of dielectric layers;
a through-hole through the plurality of glass layers and the plurality of dielectric layers; and
a conductive through-hole via in the through-hole.

### Claim 2 (depends on 1)

The package substrate of claim 1, wherein the conductive through-hole via is in direct contact with the glass layers.

### Claim 3 (depends on 1)

The package substrate of claim 1, wherein the dielectric layers fully embed the glass layers.

### Claim 4 (depends on 3)

The package substrate of claim 3, wherein the conductive through-hole via is separated from sidewall surfaces of the glass layers by the dielectric layers.

### Claim 5 (depends on 1)

The package substrate of claim 1, wherein the thickness of each of the glass layers is approximately 100 μm or less.

### Claim 6 (depends on 1)

The package substrate of claim 1, wherein the thickness of each of the dielectric layers is approximately 100 nm or less.

### Claim 7 (depends on 1)

The package substrate of claim 1, wherein a diameter of the through-hole is approximately 100 μm or more.

### Claim 8 (depends on 1)

The package substrate of claim 1, wherein an aspect ratio of a thickness of the glass layers to a through-hole diameter (thickness:diameter) is 1:1 or less.

### Claim 9 (depends on 1)

The package substrate of claim 1, wherein the through-hole comprises a plurality of openings stacked over each other, wherein each opening is through one of the plurality of glass layers.

### Claim 10 (depends on 9)

The package substrate of claim 9, wherein an amount of misalignment between neighboring openings of the plurality of openings is less than 5 μm.

### Claim 11 (depends on 9)

The package substrate of claim 9, wherein each opening has a vertical profile.

### Claim 12 (depends on 1)

The package substrate of claim 1, wherein a thickness of the package substrate is approximately 500 μm or greater.

### Claim 13

An electronic package, comprising:
a die; and
a package substrate electrically coupled to the die, wherein the package substrate comprises:
a core, wherein the core comprises:
a plurality of glass layers alternating with a plurality of dielectric layers, wherein each of the plurality of glass layers has a thickness greater than a thickness of each one of the plurality of dielectric layers, and wherein one of the plurality of glass layers has a vertical sidewall that is recessed relative to a corresponding vertical sidewall of an overlying one of the plurality of glass layers and relative to a corresponding vertical sidewall of an underlying one of the plurality of glass layers; and
a plated through-hole via through the core.

### Claim 14 (depends on 13)

The electronic package of claim 13, wherein the plurality of glass layers have the thickness that is approximately 100 μm or less.

### Claim 15 (depends on 14)

The electronic package of claim 14, wherein an aspect ratio of the thickness of each glass layer to a diameter of the plated through-hole via (thickness:diameter) is approximately 1:1 or less.

### Claim 16 (depends on 13)

The electronic package of claim 13, wherein a thickness of the core is approximately 500 μm or greater.

### Claim 17 (depends on 13)

The electronic package of claim 13, wherein each of the dielectric layers have the thickness that is approximately 100 nm or less.

### Claim 18 (depends on 13)

The electronic package of claim 13, wherein the plurality of glass layers are each embedded by the dielectric layers.

### Claim 19 (depends on 18)

The electronic package of claim 18, wherein the plated through-hole via only contacts the dielectric layers.

### Claim 20 (depends on 13)

The electronic package of claim 13, wherein the plated through-hole via contacts sidewall surfaces of the plurality of glass layers.

### Claim 21

A hybrid core, comprising:
a plurality of glass layers, wherein one of the plurality of glass layers has a vertical sidewall that is recessed relative to a corresponding vertical sidewall of an overlying one of the plurality of glass layers and relative to a corresponding vertical sidewall of an underlying one of the plurality of glass layers;
a plurality of dielectric layers, wherein each of the plurality of glass layers has a thickness greater than a thickness of each one of the plurality of dielectric layers;
an opening through the plurality of glass layers and the plurality of dielectric layers;
a magnetic plug lining the opening; and
a plated through-hole via lining interior surfaces of the magnetic plug.

### Claim 22 (depends on 21)

The hybrid core of claim 21, wherein the magnetic plug directly contacts sidewall surfaces of the glass layers.

### Claim 23 (depends on 21)

The hybrid core of claim 21, wherein the dielectric layers fully embed each of the plurality of glass layers, and wherein the magnetic plug is separated from sidewall surfaces of the glass layers by the dielectric layers.

### Claim 24 (depends on 21)

The hybrid core of claim 21, wherein a thickness of each of the glass layers is approximately 100 μm or less, and wherein a diameter of the opening is approximately 100 μm or greater.