# US 12,191,225 B2 · Ball grid array package design

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- Number: US 12,191,225 B2
- Document ID: US12191225B2
- Status: Granted
- Kind: B2
- Application number: 18/375,750
- Filed: 2023-10-02
- Published: 2024-01-25
- Granted: 2025-01-07
- Earliest claimed: 2021-04-20
- Assignees: Dell Products L.P.
- Applicants: Dell Products L.P.
- Inventors: Qinghong He; Isaac Q. Wang
- Web page: https://patentgrep.com/patent/US12191225B2

## CPC

- H10W 40/228: {the projecting parts being wire-shaped or pin-shaped}
- H10W 40/73: for cooling by change of state
- H05K 1/0201: {Thermal arrangements, e.g. for cooling, heating or preventing overheating}
- H05K 1/021: {Components thermally connected to metal substrates or heat-sinks by insert mounting}
- H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)}
- H10W 20/42: Vias, e.g. via plugs
- H10W 20/43: Layouts of interconnections
- H10W 70/635: {Through-vias}
- H10W 70/68: Shapes or dispositions thereof
- H10W 70/69: Insulating materials thereof
- H10W 95/00: Packaging processes not covered by the other groups of this subclass
- H05K 2201/09054: Raised area or protrusion of metal substrate
- H05K 2201/10734: Ball grid array [BGA]; Bump grid array
- H10W 70/611: {for connecting multiple chips together}
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 90/00: Package configurations
- H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs}
- H10W 90/732: {between stacked chips}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS

## Abstract

An information handling system includes a printed circuit board (PCB) and an integrated circuit device. The integrated circuit device includes a substrate and a die that is bonded via a first surface of the die to a first surface of the substrate. The substrate includes a ball grid array (BGA) on the first surface of the substrate. The integrated circuit device is bonded to a first surface of the PCB via the BGA. The die is collocated with the cutout area.

## Claims

### Claim 1

An information handling system, comprising:
a printed circuit board (PCB) having a cutout area;
an integrated circuit device including a substrate and a die that is bonded via a first surface of the die to a first surface of the substrate, the substrate including a ball grid array (BGA) on the first surface of the substrate, the integrated circuit device being bonded to a first surface of the PCB via the BGA, wherein the die is collocated with the cutout area; and
a cold plate extending from a second surface of the PCB through the cutout area, the cold plate being thermally coupled to a second surface of the die.

### Claim 2 (depends on 1)

The information handling system of claim 1, wherein the die includes an array of contact bumps on the first surface of the die.

### Claim 3 (depends on 2)

The information handling system of claim 2, wherein the die is bonded to the first surface of the substrate via the array of contact bumps.

### Claim 4 (depends on 3)

The information handling system of claim 3, wherein the substrate includes a first metal layer, the first metal layer coupling a first contact bump of the array of contact bumps to a first ball of the BGA.

### Claim 5 (depends on 4)

The information handling system of claim 4, wherein the substrate includes a second metal layer, the second metal layer coupling a second contact bump of the array of contact bumps to a second ball of the BGA.

### Claim 6 (depends on 1)

The information handling system of claim 1, wherein the substrate includes at least one discrete component on a second surface of the substrate.

### Claim 7 (depends on 1)

The information handling system of claim 1, further comprising a heat pipe thermally coupled to the cold plate.

### Claim 8 (depends on 7)

The information handling system of claim 7, further comprising a cover disposed over the heat pipe, the cover and the heat pipe being separated by a first air gap.

### Claim 9 (depends on 8)

The information handling system of claim 8, further comprising a keyboard disposed below the second surface of the PCB, the keyboard and the PCB being separated by a second air gap.

### Claim 10 (depends on 1)

The information handling system of claim 1, further comprising a backplate configured to compress the integrated circuit device to the first surface of the PCB.

### Claim 11 (depends on 10)

The information handling system of claim 10, wherein the backplate is affixed to the first surface of the PCB.

### Claim 12

An integrated circuit device, comprising:
a substrate; and
a die that is bonded via a first surface of the die to a first surface of the substrate, the substrate including a ball grid array (BGA) on the first surface of the substrate and a capacitor on a second surface of the substrate.

### Claim 13 (depends on 12)

The integrated circuit device of claim 12, wherein the die includes an array of contact bumps on the first surface of the die.

### Claim 14 (depends on 13)

The integrated circuit device of claim 13, wherein the die is bonded to the first surface of the substrate via the array of contact bumps.

### Claim 15 (depends on 14)

The integrated circuit device of claim 14, wherein the substrate includes a first metal layer, the first metal layer coupling a first contact bump of the array of contact bumps to a first ball of the BGA.

### Claim 16 (depends on 15)

The integrated circuit device of claim 15, wherein the substrate includes a second metal layer, the second metal layer coupling a second contact bump of the array of contact bumps to a second ball of the BGA.

### Claim 17

An information handling system, comprising:
a printed circuit board (PCB) having a cutout area;
an integrated circuit device including a substrate and a die that is bonded via a first surface of the die to a first surface of the substrate, the substrate including a ball grid array (BGA) on the first surface of the substrate, the integrated circuit device being bonded to a first surface of the PCB via the BGA, wherein the die is collocated with the cutout area; and
a cold plate affixed on a second surface of the PCB and extending through the cutout area, the cold plate being thermally coupled to a second surface of the die.

### Claim 18 (depends on 17)

The information handling system of claim 17, wherein the die includes an array of contact bumps on the first surface of the die.

### Claim 19 (depends on 18)

The information handling system of claim 18, wherein the die is bonded to the first surface of the substrate via the array of contact bumps.

### Claim 20 (depends on 19)

The information handling system of claim 19, wherein the substrate includes a first metal layer, the first metal layer coupling a first contact bump of the array of contact bumps to a first ball of the BGA.