# US 12,191,196 B2 · Method of manufacturing a metal-oxide-semiconductor field-effect transistor (MOSFET) having low off-state capacitance

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- Number: US 12,191,196 B2
- Document ID: US12191196B2
- Status: Granted
- Kind: B2
- Application number: 17/815,274
- Filed: 2022-07-27
- Published: 2022-11-17
- Granted: 2025-01-07
- Earliest claimed: 2021-01-07
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Gulbagh Singh; Tsung-Han Tsai; Shih-Lu Hsu; Kun-Tsang Chuang
- Web page: https://patentgrep.com/patent/US12191196B2

## CPC

- H10D 86/01: Manufacture or treatment
- H10W 20/46: comprising air gaps
- H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence)
- H10D 64/0112: {using conductive layers comprising silicides}
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D 86/201: {the substrates comprising an insulating layer on a semiconductor body, e.g. SOI (H10D86/40 take precedence)}
- H10W 20/0698: {Local interconnections}
- H10W 20/072: {of dielectric parts comprising air gaps}
- H10W 20/083: {the openings being via holes penetrating underlying conductors}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/47: comprising two or more dielectric layers having different properties, e.g. different dielectric constants
- H10W 20/48: Insulating materials thereof
- H10W 20/495: {Capacitive arrangements or effects of, or between wiring layers}
- H10D 30/0212: {using self-aligned silicidation}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device may include a source on a first side of a gate. The semiconductor device may include a drain on a second side of the gate, where the second side of the gate is opposite to the first side of the gate. The semiconductor device may include a first contact over the source. The semiconductor device may include a second contact over the drain. The semiconductor device may include an air gap over the gate between at least the first contact and the second contact. The semiconductor device may include at least two dielectric materials in each of a region between the air gap and the first contact and a region between the air gap and the second contact.

## Claims

### Claim 1

A semiconductor device, comprising:
a source on a first side of a gate;
a drain on a second side of the gate, the second side of the gate being opposite to the first side of the gate;
a first contact over the source;
a second contact over the drain;
an air gap over the gate between at least the first contact and the second contact;
at least two dielectric materials in each of a region between the air gap and the first contact and a region between the air gap and the second contact; and
a liner layer that is over the first contact and the second contact and that is under the air gap.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, further comprising:
a stop layer over the gate; and
a dielectric film over the stop layer, the dielectric film having an opening below the air gap.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the at least two dielectric materials include a first dielectric material and a second dielectric material, wherein the second dielectric material is between the air gap and the first dielectric material in the region between the air gap and the second contact and in the region between the air gap and the second contact.

### Claim 4 (depends on 3)

The semiconductor device of claim 3, wherein a dielectric constant of the second dielectric material is less than a dielectric constant of the first dielectric material.

### Claim 5 (depends on 3)

The semiconductor device of claim 3, wherein the first dielectric material comprises phosphorous.

### Claim 6 (depends on 3)

The semiconductor device of claim 3, wherein the second dielectric material comprises fluorine.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, further comprising one or more metal layers, over the first contact and the second contact, comprising a first portion over the first contact and a second portion over the second contact, wherein the air gap is between the first portion and the second portion.

### Claim 8 (depends on 7)

The semiconductor device of claim 7, wherein an area of the air gap between the first portion and the second portion is greater than an area of the air gap between the first contact and the second contact.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, further comprising one or more dielectric layers, wherein the air gap is between a portion of at least one dielectric layer of the one or more dielectric layers that is on the first side of the gate and a portion of the at least one dielectric layer that is on the second side of the gate.

### Claim 10 (depends on 1)

The semiconductor device of claim 1, wherein a size of the air gap nearer to a bottom of the air gap is larger than a size of the air gap nearer to a top of the air gap.

### Claim 11 (depends on 1)

The semiconductor device of claim 1, wherein the semiconductor device includes a metal-oxide-semiconductor field-effect transistor (MOSFET).

### Claim 12 (depends on 1)

The semiconductor device of claim 1, wherein the liner layer is between two of the at least two dielectric materials.

### Claim 13

A semiconductor device comprising:
a first contact on a first side of a gate;
a second contact on a second side of the gate;
a first dielectric material, between the first contact and the second contact, comprising a first portion adjacent to the first contact and a second portion adjacent to the second contact;
a second dielectric material between the first portion of the first dielectric material and the second portion of the first dielectric material, the second dielectric material being over the gate,
wherein a dielectric constant of the first dielectric material is greater than a dielectric constant of the second dielectric material; and
a liner layer that is over the first contact and the second contact.

### Claim 14 (depends on 13)

The semiconductor device of claim 13, further comprising an air gap between the first contact and the second contact within the second dielectric material.

### Claim 15 (depends on 14)

The semiconductor device of claim 14, wherein the first dielectric material and second dielectric material are each in a region between the air gap and the first contact and a region between the air gap and the second contact.

### Claim 16 (depends on 14)

The semiconductor device of claim 14, further comprising:
a stop layer over the gate; and
a dielectric film over the stop layer, the dielectric film having an opening below the air gap such that one of the first dielectric material and the second dielectric material is on the stop layer below the air gap.

### Claim 17 (depends on 14)

The semiconductor device of claim 14, wherein the first dielectric material is between the air gap and the first dielectric material in a region between the air gap and the first contact, and wherein the second dielectric material is between the air gap and the first dielectric material in the region between the air gap and the second contact.

### Claim 18 (depends on 14)

The semiconductor device of claim 14, further comprising one or more metal layers, over the first contact and the second contact, comprising a first portion over the first contact and a second portion over the second contact,
wherein the air gap is between the first portion and the second portion.

### Claim 19 (depends on 14)

The semiconductor device of claim 14, further comprising one or more dielectric layers, wherein the air gap is between a first portion of the one or more dielectric layers that is on the first side of the gate and a second portion of the one or more dielectric layers that is on the second side of the gate.

### Claim 20

A semiconductor device, comprising:
a source and a drain that are each on a gate;
an air gap over the gate between a first contact, over the source, and a second contact over the drain;
a dielectric material in a region between the air gap and the first contact and a region between the air gap and the second contact; and
a liner layer that is over the first contact and the second contact and that is under the air gap.