# US 12,191,160 B2 · Method for making a semiconductor superlattices with different non-semiconductor thermal stabilities > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,191,160 B2 - Document ID: US12191160B2 - Status: Granted - Kind: B2 - Application number: 17/305,192 - Filed: 2021-07-01 - Published: 2022-01-06 - Granted: 2025-01-07 - Earliest claimed: 2020-07-02 - Assignees: Atomera Incorporated - Applicants: Atomera Incorporated - Inventors: Keith Doran Weeks; Nyles Wynn Cody; Marek Hytha; Robert J. Mears - Web page: https://patentgrep.com/patent/US12191160B2 ## CPC - H10D 62/8162: {having quantum effects only in the vertical direction, i.e. layered structures having quantum effects solely resulting from vertical potential variation} - H10P 36/20: Intrinsic gettering, i.e. thermally inducing defects by using oxygen present in the silicon body - H10P 14/3252: {Alternating layers, e.g. superlattice} - H10P 14/3238: {being insulating materials} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A method for making a semiconductor device may include forming first and second superlattices adjacent a semiconductor layer. Each of the first and second superlattices may include stacked groups of layers, with each group of layers including stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The second superlattice may have a greater thermal stability with respect to non-semiconductor atoms therein than the first superlattice. The method may further include heating the first and second superlattices to cause non-semiconductor atoms from the first superlattice to migrate toward the at least one non-semiconductor monolayer of the second superlattice. ## Claims ### Claim 1 A method for making a semiconductor device comprising: forming first and second superlattices adjacent a semiconductor layer and each comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions, the second superlattice having a greater thermal stability with respect to thermally induced migration of non-semiconductor atoms from positions within the second superlattice than thermally induced migration of non-semiconductor atoms from positions within the first superlattice; and heating the first and second superlattices to cause non-semiconductor atoms from the first superlattice to migrate toward the at least one non-semiconductor monolayer of the second superlattice. ### Claim 2 (depends on 1) The method of claim 1 wherein the first superlattice is below the second superlattice; and further comprising forming a third superlattice above the second superlattice and comprising a plurality of stacked groups of layers with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions; wherein the second superlattice has a greater thermal stability with respect to non-semiconductor atoms than the third superlattice. ### Claim 3 (depends on 1) The method of claim 1 further comprising forming a semiconductor layer above the first and second superlattices at a temperature of at least 1000° C. and for a time period of at least thirty seconds. ### Claim 4 (depends on 3) The method of claim 3 wherein the semiconductor layer has a thickness of at least 500 nm. ### Claim 5 (depends on 1) The method of claim 1 wherein forming the second superlattice comprises forming the second superlattice at a temperature above 600° C. ### Claim 6 (depends on 1) The method of claim 1 wherein forming the first superlattice comprises forming the first superlattice at a temperature below 600° C. ### Claim 7 (depends on 1) The method of claim 1 further comprising forming a semiconductor cap layer above the first and second superlattices. ### Claim 8 (depends on 1) The method of claim 1 wherein heating comprises annealing in an ambient comprising one or more of the group of hydrogen, nitrogen, helium, and argon. ### Claim 9 (depends on 1) The method of claim 1 wherein the at least one non-semiconductor monolayer of the first and second superlattices comprises oxygen. ### Claim 10 (depends on 1) The method of claim 1 wherein the base semiconductor layers of the first and second superlattices comprise silicon. ### Claim 11 A method for making a semiconductor device comprising: forming first and second superlattices adjacent a semiconductor layer and each comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions, the second superlattice having a greater thermal stability with respect to thermally induced migration of non-semiconductor atoms from positions within the second superlattice than thermally induced migration of non-semiconductor atoms from positions within the first superlattice; and heating the first and second superlattices to cause non-semiconductor atoms from the first superlattice to migrate toward the at least one non-semiconductor monolayer of the second superlattice; wherein forming the second superlattice comprises forming the second superlattice at a temperature above 600° C., and forming the first superlattice comprises forming the first superlattice at a temperature below 600° C. ### Claim 12 (depends on 11) The method of claim 11 wherein the first superlattice is below the second superlattice; and further comprising forming a third superlattice above the second superlattice and comprising a plurality of stacked groups of layers with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions; and wherein the second superlattice has a greater thermal stability with respect to non-semiconductor atoms than the third superlattice. ### Claim 13 (depends on 11) The method of claim 11 further comprising forming a semiconductor layer above the first and second superlattices at a temperature of at least 1000° C. and for a time period of at least thirty seconds. ### Claim 14 (depends on 13) The method of claim 13 wherein the semiconductor layer has a thickness of at least 500 nm. ### Claim 15 (depends on 11) The method of claim 11 further comprising forming a semiconductor cap layer above the first and second superlattices. ### Claim 16 (depends on 11) The method of claim 11 wherein heating comprises annealing in an ambient comprising one or more of the group of hydrogen, nitrogen, helium, and argon.