# US 12,191,150 B2 · Switching device and method for manufacturing the same

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- Number: US 12,191,150 B2
- Document ID: US12191150B2
- Status: Granted
- Kind: B2
- Application number: 17/590,988
- Filed: 2022-02-02
- Published: 2022-08-25
- Granted: 2025-01-07
- Earliest claimed: 2021-02-25
- Assignees: Denso Corporation; Toyota Jidosha Kabushiki Kaisha; MIRISE Technologies Corporation; Kochi Prefectural Public University Corporation
- Applicants: Denso Corporation; Toyota Jidosha Kabushiki Kaisha; MIRISE Technologies Corporation; Kochi Prefectural Public University Corporation
- Inventors: Hidemoto Tomita; Takashi Okawa; Toshiyuki Kawaharamura; Li Liu
- Web page: https://patentgrep.com/patent/US12191150B2

## CPC

- H10D 64/01358: {the insulator being formed after the semiconductor body, the semiconductor being a Group III-V material}
- H10D 30/021: {of FETs having insulated gates [IGFET]}
- H10D 30/0291: {of vertical DMOS [VDMOS] FETs}
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 30/66: Vertical DMOS [VDMOS] FETs
- H10D 64/68: characterised by the insulator, e.g. by the gate insulator
- H10D 64/685: {being perpendicular to the channel plane}
- H10P 14/6334: {using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition (deposition by physical ablation of a target H10P14/6329)}
- H10P 14/6339: {deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD}
- H10P 14/6342: {Liquid deposition, e.g. spin-coating, sol-gel techniques or spray coating}
- H10P 14/6346: {using printing, e.g. ink-jet printing}
- H10P 14/69215: {the material being a silicon oxide, e.g. SiO2}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10P 14/6312: {of Group III-V semiconductors}
- H10P 14/6939: {characterised by the metal}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A switching includes a gallium nitride semiconductor and a gate insulation film. The gate insulation film is made of silicon oxide and disposed above the gallium nitride semiconductor layer. An interface between the gallium nitride insulation film and the gate insulation film is either free of a gallium oxide layer or provided with the gallium oxide layer with a thickness of 1 nanometer or smaller.

## Claims

### Claim 1

A switching device comprising:
a gallium nitride semiconductor layer; and
a gate insulation film made of silicon oxide and disposed above the gallium nitride semiconductor layer,
wherein an interface between the gallium nitride semiconductor layer and the gate insulation film is either free of a gallium oxide layer or provided with the gallium oxide layer with a thickness of 1 nanometer or smaller, and
a dipole is not formed across the interface between the gallium nitride semiconductor layer and the gate insulation film.

### Claim 2

A switching device comprising:
a gallium nitride semiconductor layer; and
a gate insulation film made of silicon oxide and disposed above the gallium nitride semiconductor layer,
wherein an interface between the gallium nitride semiconductor layer and the gate insulation film is free of a gallium oxide layer.

### Claim 3 (depends on 2)

The switching device according to claim 2,
wherein the gate insulation film is free of an amorphous layer.

### Claim 4 (depends on 3)

The switching device according to claim 3, further comprising:
an electrode being in direct contact with the gate insulation film.

### Claim 5

A switching device comprising:
a gallium nitride semiconductor layer;
a silicon oxide gate insulation film disposed above the gallium nitride semiconductor layer; and
a dipole-free interface between the gallium nitride semiconductor layer and the silicon oxide gate insulation film that is either free of a gallium oxide layer or that includes the gallium oxide layer with a thickness of 1 nm or less.