# US 12,191,084 B2 · Multi-layered ceramic capacitor and method of manufacturing the same

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- Number: US 12,191,084 B2
- Document ID: US12191084B2
- Status: Granted
- Kind: B2
- Application number: 18/072,914
- Filed: 2022-12-01
- Published: 2023-06-29
- Granted: 2025-01-07
- Earliest claimed: 2021-12-28
- Assignees: Samsung Electro-Mechanics Co., Ltd.
- Applicants: Samsung Electro-Mechanics Co., Ltd.
- Inventors: Hee Jung Jung; Jun Il Kang; Mi Jung Park
- Web page: https://patentgrep.com/patent/US12191084B2

## CPC

- H01G 4/2325: {characterised by the material of the terminals}
- H01G 4/232: electrically connecting two or more layers of a stacked or rolled capacitor
- H01G 4/248: the terminals embracing or surrounding the capacitive element, e.g. caps (H01G4/252 takes precedence)
- H01G 4/30: Stacked capacitors (H01G4/33 takes precedence)
- H01G 4/12: Ceramic dielectrics {(H01G4/085 takes precedence)}
- H01G: CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE (selection of specified materials as dielectric H01B3/00; capacitors having potential barriers H10D1/62, H10K10/10)

## Abstract

A multilayer ceramic capacitor and a method of manufacturing the same are disposed. The multilayer ceramic capacitor includes: a body including a plurality of internal electrodes and a dielectric layer interposed between the plurality of internal electrodes; and external electrodes disposed on the body and connected to the internal electrodes, respectively. One of the external electrodes includes a first plating layer, and the first plating layer includes a crystal grain in which an average ratio of major and minor axes thereof is 1:1 to 3:1.

## Claims

### Claim 1

A multilayer ceramic capacitor comprising:
a body including a plurality of internal electrodes and a dielectric layer interposed between the plurality of internal electrodes; and
external electrodes disposed on the body and connected to the internal electrodes, respectively,
wherein one of the external electrodes includes a first plating layer, and the first plating layer includes a crystal grain in which an average ratio of major and minor axes thereof is 1:1 to 3:1.

### Claim 2 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the first plating layer includes a nickel plating layer.

### Claim 3 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the major axis represents a maximum dimension of the crystal grain, and
the minor axis represents a maximum dimension of the crystal grain, measured in a direction perpendicular to a measurement direction of the major axis.

### Claim 4 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein a ratio of the crystal grain in which the ratio of major and minor axes thereof satisfies 1:1 to 3:1 is analyzed to be 50% or more of an entire area of the first plating layer in a cross-section of the multilayer ceramic capacitor.

### Claim 5 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the average ratio of the major and minor axes of the crystal grain is 1.5:1 to 2.5:1.

### Claim 6 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the first plating layer includes the crystal grain having an average size of 0.3 to 1.5 μm.

### Claim 7 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the first plating layer has an average thickness of 1 to 10 μm.

### Claim 8 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the first plating layer includes the crystal grain having the major axis of 0.2 to 2 μm.

### Claim 9 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the one of the external electrodes further includes a second plating layer disposed on the first plating layer.

### Claim 10 (depends on 9)

The multilayer ceramic capacitor of claim 9, wherein the second plating layer includes a tin (Sn) plating layer.

### Claim 11 (depends on 9)

The multilayer ceramic capacitor of claim 9, wherein the second plating layer has an average thickness of 2 to 10 μm.

### Claim 12 (depends on 9)

The multilayer ceramic capacitor of claim 9, wherein an average ratio W2/W1 of a thickness W2 of the second plating layer to a thickness W1 of the first plating layer is 1 to 10.

### Claim 13 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the one of the external electrodes further includes an electrode layer disposed between the body and the first plating layer, and connected to the internal electrode.

### Claim 14

A multilayer ceramic capacitor comprising:
a body including a plurality of internal electrodes and a dielectric layer interposed between the plurality of internal electrodes; and
external electrodes disposed on the body and connected to the internal electrodes, respectively,
wherein one of the external electrodes includes a first plating layer, and the first plating layer includes a crystal grain having an average size of 0.3 to 1.5 μm, and
wherein the first plating layer includes a crystal grain having a major axis of 0.2 to 2 μm.

### Claim 15 (depends on 14)

The multilayer ceramic capacitor of claim 14, wherein the first plating layer includes a nickel plating layer.

### Claim 16 (depends on 14)

The multilayer ceramic capacitor of claim 14, wherein the first plating layer has an average thickness of 1 to 10 μm.

### Claim 17 (depends on 14)

The multilayer ceramic capacitor of claim 14, wherein the one of the external electrodes further includes a second plating layer disposed on the first plating layer.

### Claim 18 (depends on 17)

The multilayer ceramic capacitor of claim 17, wherein the second plating layer includes a tin (Sn) plating layer.

### Claim 19 (depends on 17)

The multilayer ceramic capacitor of claim 17, wherein the second plating layer has an average thickness of 2 to 10 μm.
