# US 12,190,991 B2 · Off-chip driving device and driving capability enhancement method thereof

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- Number: US 12,190,991 B2
- Document ID: US12190991B2
- Status: Granted
- Kind: B2
- Application number: 18/154,860
- Filed: 2023-01-16
- Published: 2024-07-18
- Granted: 2025-01-07
- Earliest claimed: 2023-01-16
- Assignees: Nanya Technology Corporation
- Applicants: Nanya Technology Corporation
- Inventors: Chang-Ting Wu
- Web page: https://patentgrep.com/patent/US12190991B2

## CPC

- G11C 7/02: with means for avoiding parasitic signals
- G11C 7/1066: {Output synchronization}
- G06F 13/4072: {Drivers or receivers (G06F13/4086 takes precedence; for multistate logic circuits H03K19/0002)}
- G11C 7/1057: {Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load}
- G11C 7/1069: {I/O lines read out arrangements}
- G11C 7/1093: {Input synchronization}
- G11C: STATIC STORES (semiconductor memory devices H10B)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

An off-chip driving device and a driving capability enhancement method thereof are provided. Detecting a rising edge and a falling edge of an input data signal. A first enhancement circuit is controlled to provide a first enhancement signal to an input/output pad according to the rising edge and the falling edge of the input data signal.

## Claims

### Claim 1

An off-chip driving device, comprising:
a driver circuit comprising:
at least one pull-up driver;
at least one first resistor coupled between the at least one pull-up driver and an input/output pad;
a first enhancement circuit coupled to the at least one first resistor; and
a first switching circuit coupled between the first enhancement circuit and the at least one first resistor; and
a control circuit coupled to the at least one pull-up driver and the first enhancement circuit, and detecting a rising edge and a falling edge of an input data signal and controlling the first enhancement circuit to provide a first enhancement signal to the input/output pad according to the rising edge and the falling edge of the input data signal, wherein the first switching circuit is controlled by the control circuit to switch the first enhancement circuit to be connected to the first end of the at least one first resistor, the second end of the at least one first resistor, or the position between the first end and the second end of the at least one first resistor.

### Claim 2 (depends on 1)

The off-chip driving device according to claim 1, wherein the first switching circuit comprises a plurality of first switches respectively coupled between the first enhancement circuit and corresponding connection positions on the at least one first resistor, and conduction states of the first switches are controlled by the control circuit.

### Claim 3 (depends on 2)

The off-chip driving device according to claim 2, wherein the driver circuit further comprises:
a pull-down driver, coupled to the control circuit;
at least one second resistor coupled between the pull-down driver and the input/output pad; and
a second enhancement circuit coupled to the control circuit and the at least one second resistor, the control circuit controls the second enhancement circuit to provide a second enhancement signal to the input/output pad according to the rising edge and the falling edge of the input data signal.

### Claim 4 (depends on 3)

The off-chip driving device according to claim 3, wherein the second enhancement circuit is connected to a first end of the at least one second resistor, a second end of the at least one second resistor, or a position between the first end and the second end of the at least one second resistor.

### Claim 5 (depends on 4)

The off-chip driving device according to claim 4, wherein the driver circuit further comprises:
a second switching circuit coupled between the second enhancement circuit and the at least one second resistor, and controlled by the control circuit to switch the second enhancement circuit to be connected to the first end of the at least one second resistor, the second end of the at least one second resistor, or the position between the first end and the second end of the at least one second resistor.

### Claim 6 (depends on 5)

The off-chip driving device according to claim 5, wherein the second switching circuit comprises a plurality of second switches respectively coupled between the second enhancement circuit and corresponding connection positions on the at least one second resistor, and conduction states of the second switches are controlled by the control circuit.

### Claim 7 (depends on 3)

The off-chip driving device according to claim 3, wherein the control circuit further controls the second enhancement circuit to provide the second enhancement signal in response to the off-chip driving device being in an enhancement mode according to an enable signal, and controls the second enhancement circuit not to provide the second enhancement signal in response to the off-chip driving device being in a normal mode.

### Claim 8 (depends on 3)

The off-chip driving device according to claim 3, wherein the second enhancement circuit comprises:
an N-type transistor coupled between the at least one first resistor and a ground voltage, wherein a control end of the N-type transistor is coupled to the control circuit, and the N-type transistor is controlled by the control circuit to be turned on in response to the input data signal having the falling edge.

### Claim 9 (depends on 1)

The off-chip driving device according to claim 1, wherein the control circuit further controls the first enhancement circuit to provide the first enhancement signal in response to the off-chip driving device being in an enhancement mode according to an enable signal, and controls the first enhancement circuit not to provide the first enhancement signal in response to the off-chip driving device being in a normal mode.

### Claim 10 (depends on 1)

The off-chip driving device according to claim 1, wherein the first enhancement circuit comprises:
a P-type transistor coupled between a power supply voltage and the at least one first resistor, wherein a control end of the P-type transistor is coupled to the control circuit, and the P-type transistor is controlled by the control circuit to be turned on in response to the input data signal having the rising edge.

### Claim 11

A driving capability enhancement method of an off-chip driving device, which comprises at least one pull-up driver, at least one first resistor, a first enhancement circuit, a second enhancement circuit, a pull-down driver, a first switching circuit and at least one second resistor, wherein the at least one first resistor is coupled between the at least one pull-up driver and an input/output pad, the at least one second resistor is coupled between the pull-down driver and the input/output pad, the first enhancement circuit is coupled to the at least one first resistor, and the second enhancement circuit is coupled to the at least one second resistor, the driving capability enhancement method of the off-chip driving device comprising:
detecting a rising edge and a falling edge of an input data signal:
controlling the first enhancement circuit and the second enhancement circuit to provide a first enhancement signal and a second enhancement signal to the input/output pad according to the rising edge and the falling edge of the input data signal, to enhance strength of driving signals of the at least one pull-up driver and the pull-down driver; and
controlling the first switching circuit to switch the first enhancement circuit to be connected to a first end of the at least one first resistor, a second end of the at least one first resistor, or a position between the first end and the second end of the at least one first resistor.

### Claim 12 (depends on 11)

The driving capability enhancement method of the off-chip driving device according to claim 11, wherein the second enhancement circuit is connected to a first end of the at least one second resistor, a second end of the at least one second resistor, or a position between the first end and the second end of the at least one second resistor.

### Claim 13 (depends on 11)

The driving capability enhancement method of the off-chip driving device according to claim 11, comprising:
controlling the first enhancement circuit and the second enhancement circuit to provide the first enhancement signal and the second enhancement signal in response to the off-chip driving device being in an enhancement mode according to an enable signal, and controlling the first enhancement circuit and the second enhancement circuit not to provide the first enhancement signal and the second enhancement signal in response to the off-chip driving device being in a normal mode.
