# US 12,190,975 B2 · Adaptive DSP generation of read thresholds for gaussian and non-gaussian distributions in solid state storage using cumulative observed counts

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- Number: US 12,190,975 B2
- Document ID: US12190975B2
- Status: Granted
- Kind: B2
- Application number: 17/737,781
- Filed: 2022-05-05
- Published: 2022-10-13
- Granted: 2025-01-07
- Earliest claimed: 2021-04-06
- Assignees: Beijing Tenafe Electronic Technology Co., Ltd.
- Applicants: Beijing Tenafe Electronic Technology Co., Ltd.
- Inventors: Yingquan Wu
- Web page: https://patentgrep.com/patent/US12190975B2

## CPC

- G11C 11/5642: {Sensing or reading circuits; Data output circuits}
- G11C 29/42: using error correcting codes [ECC] or parity check
- G06F 11/1068: {in sector programmable memories, e.g. flash disk (G06F11/1072 takes precedence)}
- G11C 16/10: Programming or data input circuits
- G11C 16/26: Sensing or reading circuits; Data output circuits
- G11C 16/349: {Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles}
- G11C 29/12005: {comprising voltage or current generators}
- G11C 29/44: Indication or identification of errors, e.g. for repair
- G11C 16/0483: {comprising cells having several storage transistors connected in series}
- G11C 29/021: {in voltage or current generators}
- G11C 29/028: {with adaption or trimming of parameters}
- G11C 2211/5644: Multilevel memory comprising counting devices
- G11C: STATIC STORES (semiconductor memory devices H10B)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A level count disparity is determined based at least in part on: (1) an expected count of a plurality of cells in solid state storage and (2) an observed count of the plurality of cells in the solid state storage, where the observed count is associated with a number of cells in the solid state storage that are activated by performing a single read on the solid state storage using a previous read threshold. A next read threshold is determined, including by: determining a direction relative to the previous read threshold based at least in part on the level count disparity and independent of the second and earlier level count disparity; and determining a magnitude based at least in part on the level count disparity and the second and earlier level count disparity. Read data is obtained using the next read threshold and error correction decoding is performed.

## Claims

### Claim 1

A system, comprising:
a memory that is configured to store information associated with read threshold generation, including a second and earlier level count disparity; and
a read controller that is coupled to the memory and that is configured to:
determine a level count disparity based at least in part on: (1) an expected count of a plurality of cells in solid state storage and (2) an observed count of the plurality of cells in the solid state storage, wherein the observed count is associated with a number of cells in the solid state storage that are activated by performing a single read on the solid state storage using a previous read threshold;
determine a next read threshold based at least in part on the level count disparity, including by:
determining a direction of the next read threshold relative to the previous read threshold based at least in part on the level count disparity and independent of the second and earlier level count disparity; and
determining a magnitude of the next read threshold based at least in part on the level count disparity and the second and earlier level count disparity;
perform a read on the solid state storage using the next read threshold to obtain read data, wherein error correction decoding is performed on the read data;
perform a plurality of reads on the solid state storage at integer increments of Δ to obtain a plurality of read data at increments of Δ, wherein Δ is a smallest voltage increment supported by the solid state storage;
determine a second next read threshold based at least in part on an inversely weighted average and the plurality of read data at increments of Δ; and
perform a read on the solid state storage using the second next read threshold to obtain second read data.

### Claim 2 (depends on 1)

The system recited in claim 1, wherein determining the next read threshold is independent of an assumption that charge levels of the plurality of cells in the solid state storage have a Gaussian distribution.

### Claim 3 (depends on 1)

The system recited in claim 1, further including a hard decision error correction decoder that performs hard decision error correction decoding on the read data.

### Claim 4 (depends on 1)

The system recited in claim 1, further including a soft decision error correction decoder that performs soft decision error correction decoding on the read data.

### Claim 5 (depends on 1)

The system recited in claim 1, further including:
a hard decision error correction decoder that performs hard decision error correction decoding on the read data; and
a soft decision error correction decoder that performs soft decision error correction decoding on the second read data.

### Claim 6 (depends on 1)

The system recited in claim 1, wherein:
each of the plurality of cells is configured to store at least two bits per cell; and
the observed count includes a cumulative observed count, wherein:
the cumulative observed count is associated with a number of cells in the solid state storage that are activated by performing a single read on the solid state storage using a previous read threshold (Ti−1(t));
the cumulative observed count is independent of other read thresholds; and
the cumulative observed count includes: (1) a first number of cells (l0(t)) that are associated with a 0th state level (L0) and (2) a second number of cells (l1(t)) that are associated with a 1st state level (L1).

### Claim 7

A method, comprising:
storing information associated with read threshold generation, including a second and earlier level count disparity, in a memory;
determining a level count disparity based at least in part on: (1) an expected count of a plurality of cells in solid state storage and (2) an observed count of the plurality of cells in the solid state storage, wherein the observed count is associated with a number of cells in the solid state storage that are activated by performing a single read on the solid state storage using a previous read threshold;
determining a next read threshold based at least in part on the level count disparity, including by:
determining a direction of the next read threshold relative to the previous read threshold based at least in part on the level count disparity and independent of the second and earlier level count disparity; and
determining a magnitude of the next read threshold based at least in part on the level count disparity and the second and earlier level count disparity;
performing a read on the solid state storage using the next read threshold to obtain read data, wherein error correction decoding is performed on the read data;
determining a second next read threshold, including by:
performing a plurality of reads on the solid state storage at integer increments of Δ to obtain a plurality of read data at increments of Δ, wherein Δ is a smallest voltage increment supported by the solid state storage; and
determining the second next read threshold based at least in part on an inversely weighted average and the plurality of read data at increments of Δ; and
performing a read on the solid state storage using the second next read threshold to obtain second read data.

### Claim 8 (depends on 7)

The method recited in claim 7, wherein determining the next read threshold is independent of an assumption that charge levels of the plurality of cells in the solid state storage have a Gaussian distribution.

### Claim 9 (depends on 7)

The method recited in claim 7, further including performing hard decision error correction decoding on the read data using a hard decision error correction decoder.

### Claim 10 (depends on 7)

The method recited in claim 7, further including performing soft decision error correction decoding on the read data using a soft decision error correction decoder.

### Claim 11 (depends on 7)

The method recited in claim 7, further including:
performing hard decision error correction decoding on the read data using a hard decision error correction decoder; and
performing soft decision error correction decoding on the second read data using a soft decision error correction decoder.

### Claim 12 (depends on 7)

The method recited in claim 7, wherein:
each of the plurality of cells is configured to store at least two bits per cell; and
the observed count includes a cumulative observed count, wherein:
the cumulative observed count is associated with a number of cells in the solid state storage that are activated by performing a single read on the solid state storage using a previous read threshold (Ti−1(t));
the cumulative observed count is independent of other read thresholds; and
the cumulative observed count includes: (1) a first number of cells (l0(t)) that are associated with a 0th state level (L0) and (2) a second number of cells (l1(t)) that are associated with a 1st state level (L1).