# US 12,190,926 B2 · Layout pattern of magnetoresistive random access memory

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- Number: US 12,190,926 B2
- Document ID: US12190926B2
- Status: Granted
- Kind: B2
- Application number: 18/108,025
- Filed: 2023-02-10
- Published: 2024-06-20
- Granted: 2025-01-07
- Earliest claimed: 2022-12-20
- Assignees: United Microelectronics Corp.
- Applicants: United Microelectronics Corp.
- Inventors: Hung-Chan Lin; Jia-Rong Wu; Yi-Ting Wu
- Web page: https://patentgrep.com/patent/US12190926B2

## CPC

- G11C 11/161: {details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell}
- G11C 11/1673: {Reading or sensing circuits or methods}
- G11C 11/1675: {Writing or programming circuits or methods}
- H10B 61/20: {comprising components having three or more electrodes, e.g. transistors}
- H10B 61/22: {of the field-effect transistor [FET] type}
- H10N 50/10: Magnetoresistive devices
- G11C 11/15: using multiple magnetic layers (G11C11/155 takes precedence)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region, a first gate pattern extending from the first cell region to the third cell region along a first direction, a first diffusion region extending from the first cell region to the second cell region along a second direction, a first metal pattern adjacent to one side of the first gate pattern and overlapping the first diffusion region, a source line pattern extending from the first cell region to the second cell region along the second direction, and a first spin orbit torque (SOT) pattern extending along the first direction and overlapping the first metal pattern and the source line pattern.

## Claims

### Claim 1

A layout pattern of a magnetoresistive random access memory (MRAM), comprising:
a substrate comprising a first cell region, a second cell region, a third cell region, and a fourth cell region;
a first gate pattern extending from the first cell region to the third cell region along a first direction;
a first diffusion region extending from the first cell region to the second cell region along a second direction;
a first metal pattern adjacent to one side of the first gate pattern and overlapping the first diffusion region;
a source line pattern extending from the first cell region to the second cell region along the second direction; and
a first spin orbit torque (SOT) pattern extending along the first direction and overlapping the first metal pattern and the source line pattern.

### Claim 2 (depends on 1)

The layout pattern of a MRAM of claim 1, further comprising:
a second gate pattern extending from the first cell region to the third cell region along the first direction;
a second diffusion region extending from the first cell region to the second cell region along the second direction;
a second metal pattern adjacent to one side of the first gate pattern and overlapping the second diffusion region; and
a bit line pattern extending from the first cell region to the second cell region along the second direction.

### Claim 3 (depends on 2)

The layout pattern of a MRAM of claim 2, wherein the second gate pattern is immediately adjacent to the second cell region.

### Claim 4 (depends on 2)

The layout pattern of a MRAM of claim 2, wherein the source line pattern overlaps the first gate pattern and the second gate pattern.

### Claim 5 (depends on 1)

The layout pattern of a MRAM of claim 1, wherein the bit line pattern is between the first metal pattern and the source line pattern.

### Claim 6 (depends on 2)

The layout pattern of a MRAM of claim 2, wherein the source line pattern is between the first diffusion region and the second diffusion region.

### Claim 7 (depends on 2)

The layout pattern of a MRAM of claim 2, wherein the first metal pattern and the bit line pattern are on the same level.

### Claim 8 (depends on 1)

The layout pattern of a MRAM of claim 1, wherein the first metal pattern and the source line pattern are on the same level.

### Claim 9 (depends on 2)

The layout pattern of a MRAM of claim 2, further comprising a first magnetic tunneling junction (MTJ) extending along the second direction on the first SOT pattern.

### Claim 10 (depends on 9)

The layout pattern of a MRAM of claim 9, wherein the first MTJ overlaps the bit line pattern.

### Claim 11 (depends on 1)

The layout pattern of a MRAM of claim 1, further comprising:
a third gate pattern extending from the second cell region to the fourth cell region along the first direction;
the first diffusion region extending from the first cell region to the second cell region along the second direction;
a third metal pattern adjacent to one side of the third gate pattern and overlapping the first diffusion region;
the source line pattern extending from the first cell region to the second cell region along the second direction; and
a second SOT pattern extending along the first direction and overlapping the third metal pattern and the source line pattern.

### Claim 12 (depends on 11)

The layout pattern of a MRAM of claim 11, further comprising:
a fourth gate pattern extending from the second cell region to the fourth cell region along the first direction;
the second diffusion region extending from the first cell region to the second cell region along the second direction;
a fourth metal pattern adjacent to one side of the third gate pattern and overlapping the second diffusion region; and
the bit line pattern extending from the first cell region to the second cell region along the second direction.

### Claim 13 (depends on 12)

The layout pattern of a MRAM of claim 12, wherein the third gate pattern is between the first cell region and the fourth gate pattern.

### Claim 14 (depends on 12)

The layout pattern of a MRAM of claim 12, wherein the source line pattern overlaps the third gate pattern and the fourth gate pattern.

### Claim 15 (depends on 11)

The layout pattern of a MRAM of claim 11, wherein the bit line pattern is between the third metal pattern and the source line pattern.

### Claim 16 (depends on 12)

The layout pattern of a MRAM of claim 12, wherein the source line pattern is between the first diffusion region and the fourth metal pattern.

### Claim 17 (depends on 12)

The layout pattern of a MRAM of claim 12, wherein the third metal pattern and the bit line pattern are on the same level.

### Claim 18 (depends on 11)

The layout pattern of a MRAM of claim 11, wherein the third metal pattern and the source line pattern are on the same level.

### Claim 19 (depends on 12)

The layout pattern of a MRAM of claim 12, further comprising a second MTJ extending along the second direction on the second SOT pattern.

### Claim 20 (depends on 19)

The layout pattern of a MRAM of claim 19, wherein the second MTJ overlaps the bit line pattern.