# US 12,190,841 B2 · Liquid crystal display (LCD) panel and pixel structure solving problem of abnormal display due to vertical crosstalk

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- Number: US 12,190,841 B2
- Document ID: US12190841B2
- Status: Granted
- Kind: B2
- Application number: 17/762,178
- Filed: 2022-02-24
- Published: 2024-02-08
- Granted: 2025-01-07
- Earliest claimed: 2022-02-17
- Assignees: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Applicants: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Inventors: Ruifa Tan; Tianhong Wang; Xiaohui Yao
- Web page: https://patentgrep.com/patent/US12190841B2

## CPC

- G02F 1/13606: {having means for reducing parasitic capacitance}
- G09G 3/3648: {using an active matrix (G09G3/367 - G09G3/3696 take precedence)}
- G02F 1/1309: {Repairing; Testing}
- G02F 1/134336: {Matrix}
- G02F 1/136286: {Wiring, e.g. gate line, drain line}
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/60: wherein the TFTs are in active matrices
- G09G 2300/0408: Integration of the drivers onto the display substrate
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2300/0439: Pixel structures
- G09G 2300/0447: for multi-domain technique to improve the viewing angle in a liquid crystal display, such as multi-vertical alignment [MVA]
- G09G 2300/0852: being a dynamic memory with more than one capacitor
- G09G 2320/0209: Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
- G09G 2320/0219: Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
- G09G 2320/0233: Improving the luminance or brightness uniformity across the screen
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A pixel structure and a display panel are provided. The pixel structure includes a first pixel electrode, a first longitudinal signal line, and a second longitudinal signal line. The first pixel electrode includes a first main pixel area and a first sub-pixel area. The first longitudinal signal line includes a first main line and a first secondary-line. The second longitudinal signal line includes a second main line and a second secondary-line. The first main line and the second main line are arranged in the first main pixel area, and the first secondary-line and the second secondary-line are arranged in the first sub-pixel area.

## Claims

### Claim 1

A display panel comprising:
a base substrate; and
a pixel structure disposed on the base substrate, wherein the pixel structure comprises:
a first pixel electrode comprising a first main pixel area and a first sub-pixel area, wherein the first main pixel area and the first sub-pixel area are arranged in a second direction perpendicular to the first direction;
a second pixel electrode arranged in alternation with the first pixel electrode in a first direction and comprising a second main pixel area and a second sub-pixel area, wherein the second main pixel area and the second sub-pixel area are arranged in the second direction;
a transverse signal line located between the first main pixel area and the first sub-pixel area and extending in the first direction, wherein the transverse signal line is a scan signal line;
a first longitudinal signal line comprising a first main line and a first secondary-line extending along the second direction, wherein the first longitudinal signal line is a data signal line; and
a second longitudinal signal line comprising a second main line and a second secondary-line extending along the second direction, wherein the second longitudinal signal line is a data signal line;
wherein each of the first main line and the second main line is arranged in the first main pixel area, each of the first secondary-line and the second secondary-line is arranged in the first sub-pixel area, and electrical signals on the first longitudinal signal line and the second longitudinal signal line are opposite; and
wherein the display panel further comprises:
a first common electrode disposed on the base substrate;
a second common electrode disposed on the base substrate and in a same layer as the first common electrode;
a first insulating layer disposed on the base substrate and covering the first common electrode and the second common electrode; wherein the first longitudinal signal line and the second longitudinal signal line are disposed on the first insulating layer and in a same layer;
a second insulating layer disposed on the first insulating layer and covering the first longitudinal signal line and the second longitudinal signal line;
a first shared electrode disposed on the second insulating layer, wherein the first shared electrode is disposed between the first longitudinal signal line and the second longitudinal signal line in a direction parallel to the base substrate;
a second shared electrode disposed on the second insulating layer; and
a third insulating layer disposed on the second insulating layer and covering the first shared electrode and the second shared electrode;
wherein the first pixel electrode and the second pixel electrode are disposed on the third insulating layer, the first pixel electrode covers the first shared electrode, and the second pixel electrode covers the second shared electrode.

### Claim 2 (depends on 1)

The display panel of claim 1, wherein each of the first longitudinal signal line and the second longitudinal signal line is located within an area between an edge region and a center region of the first pixel electrode.

### Claim 3 (depends on 2)

The display panel of claim 2, wherein the first longitudinal signal line and the second longitudinal signal line are symmetrical with respect to a center line of the first pixel electrode.

### Claim 4 (depends on 3)

The display panel of claim 3, wherein the first longitudinal signal line is electrically connected to one of the first pixel electrode or the second pixel electrode, and the second longitudinal signal line is electrically connected to another of the first pixel electrode or the second pixel electrode.

### Claim 5 (depends on 4)

The display panel of claim 4, wherein the first pixel electrode and the second pixel electrode are alternately arranged in a second direction, wherein the first longitudinal signal line further comprises a first sub-line, one end of the first sub-line is electrically connected to the first main line, and another end is electrically connected to the first secondary-line;
wherein the second longitudinal signal line further comprises a second sub-line, one end of the second sub-line is electrically connected to the second main line, and another end of the second sub-line is electrically connected to the second secondary-line.

### Claim 6 (depends on 1)

The display panel of claim 1, further comprising a first shared electrode arranged along and overlapping a center line of the first pixel electrode.

### Claim 7 (depends on 6)

The display panel of claim 6, further comprising a second shared electrode arranged along and overlapping a center line of the second pixel electrode.

### Claim 8 (depends on 7)

The display panel of claim 7, wherein the first shared electrode and the second shared electrode receive different voltage signals, respectively.

### Claim 9 (depends on 1)

The display panel of claim 1, wherein the first main pixel area comprises a first transistor, a first liquid crystal capacitor, and a first storage capacitor; wherein a gate of the first transistor is electrically connected to the transverse signal line, a source of the first transistor is electrically connected to the first main line, and a drain of the first transistor is electrically connected to the first liquid crystal capacitor; and
wherein the first sub-pixel area comprises a second transistor, a third transistor, a second liquid crystal capacitor, and a second storage capacitor; wherein a gate of the second transistor and a gate of the third transistor are electrically connected to the transverse signal line, a source of the second transistor and a source of the third transistor are electrically connected to the first secondary-line, a drain of the second transistor is electrically connected to the second liquid crystal capacitor, and a drain of the third transistor is electrically connected to a common electrode.