# US 12,190,820 B2 · Pixel circuit, pixel driving method and display device

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,190,820 B2
- Document ID: US12190820B2
- Status: Granted
- Kind: B2
- Application number: 17/769,045
- Filed: 2021-04-26
- Published: 2023-01-26
- Granted: 2025-01-07
- Earliest claimed: 2021-04-26
- Assignees: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd.
- Applicants: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd.
- Inventors: Benlian Wang; Yao Huang; Weiyun Huang; Ming Hu
- Web page: https://patentgrep.com/patent/US12190820B2

## CPC

- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 3/3258: with pixel circuitry controlling the voltage across the light-emitting element
- G09G 3/3291: in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
- G09G 2300/0417: Special arrangements specific to the use of low carrier mobility technology
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2310/0256: with the purpose of reversing the voltage across a light emitting or modulating element within a pixel
- G09G 2320/0214: with crosstalk due to leakage current of pixel switch in active matrix panels
- G09G 2320/0238: Improving the black level
- G09G 2320/0633: by amplitude modulation of the brightness of the illumination source
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

The present disclosure provides a pixel circuit, a pixel driving method and a display device. The pixel circuit includes a first initialization circuit and a compensation circuit; the first initialization circuit is configured to write a first initial voltage into the driving control node under the control of an initial control signal; the compensation circuit is configured to control the driving control node to be connected to the first node under the control of a compensation control signal. The first initialization circuit or the compensation circuit includes an oxide thin film transistor; or, one of the first initialization circuit and the compensation circuit includes a low temperature polysilicon thin film transistor and an oxide transistor connected in series, and the other of the first initialization circuit and the compensation circuit includes an oxide thin film transistor.

## Claims

### Claim 1

A pixel circuit, comprising a first initialization circuit, a compensation circuit and a data writing-in circuit, wherein:
the first initialization circuit is electrically connected to an initial control line, a first initial voltage terminal and a driving control node, and is configured to control the first initial voltage terminal to write a first initial voltage into the driving control node under the control of an initial control signal provided by the initial control line;
the compensation circuit is electrically connected to a compensation control line, the driving control node and a first node, and is configured to control the driving control node to be connected to the first node under the control of a compensation control signal provided by the compensation control line;
one of the first initialization circuit and the compensation circuit comprises a low temperature polysilicon thin film transistor and an oxide transistor connected in series, and the other of the first initialization circuit and the compensation circuit only comprises an oxide thin film transistor;
the data writing-in circuit is electrically connected to a writing-in control line, a data line and a second node respectively, and is configured to, under the control of a writing-in control signal provided by the writing-in control line, control to write a data voltage on the data line into the second node;
the first initialization circuit comprises a first transistor and a third transistor, the compensation circuit comprises a second transistor, and the data writing-in circuit comprises a seventh transistor; and the third transistor is an oxide transistor; wherein
a control electrode of the third transistor is electrically connected to a first scan line in an (n−1)th row, where n is a positive integer;
a control electrode of the first transistor is electrically connected to the initial control line;
a control electrode of the second transistor is electrically connected to the compensation control line;
a control electrode of the seventh transistor is electrically connected to the writing-in control line;
the initial control line is a second scan line in the (n−1)th row, the compensation control line is a first scan line in an nth row, the writing-in control line is a second scan line in an nth row;
the first scan line in the nth row and the first scan line in the (n−1)th row have a same waveform with a shifted phase, the second scan line in the nth row and the second scan line in the (n−1)th row have a same waveform with the shifted phase; and
a display period of the pixel circuit comprises an initialization stage and a data writing-in stage that are set in sequence;
in the initialization stage and the data writing-in stage, a turning-on period of the first transistor and the third transistor does not overlap a turning-on period of the second transistor and the seventh transistor;
or,
the first initialization circuit comprises a first transistor, the compensation circuit comprises a second transistor and a fourth transistor; and the data writing-in circuit comprises a seventh transistor; and the first transistor is an oxide transistor; wherein
a control electrode of the first transistor is electrically connected to the initial control line;
a control electrode of the second transistor is electrically connected to the compensation control line, and a first electrode of the second transistor is electrically connected to the driving control node;
a control electrode of the fourth transistor is electrically connected to a first scan line in an nth row; where n is a positive integer; a first electrode of the fourth transistor is merely electrically connected to the second electrode of the second transistor, and a second electrode of the fourth transistor is electrically connected to the first node;
a control electrode of the seventh transistor is electrically connected to the writing-in control line;
or,
a control electrode of the first transistor is electrically connected to the initial control line;
a control electrode of the second transistor is electrically connected to the compensation control line, a first electrode of the second transistor is merely electrically connected to a second electrode of the fourth transistor, and a second electrode of the second transistor is electrically connected to the first node;
a control electrode of the fourth transistor is electrically connected to a first scan line in an nth row, and a first electrode of the fourth transistor is electrically connected to the driving control node;
a control electrode of the seventh transistor is electrically connected to the writing-in control line; and
wherein the second transistor and the seventh transistor are p-type transistors, and the first transistor and the fourth transistor are n-type transistors,
the initial control line is a first scan line in an (n−1)th row, and the compensation control line is a second scan line in the nth row; the writing-in control line is a second scan line in an nth row;
the first scan line in the nth row and the first scan line in the (n−1)th row have a same waveform with a shifted phase, the second scan line in the nth row and the second scan line in the (n−1)th row have a same waveform with the shifted phase; and
a display period of the pixel circuit comprises an initialization stage and a data writing-in stage that are set in sequence;
in the initialization stage and the data writing-in stage, a turning-on period of the first transistor does not overlap a turning-on period of the second transistor, the fourth transistor and the seventh transistor.

### Claim 2 (depends on 1)

The pixel circuit according to claim 1, wherein the first initialization circuit comprises a first transistor, and the compensation circuit comprises a second transistor;
a control electrode of the first transistor is electrically connected to the initial control line, a first electrode of the first transistor is electrically connected to the first initial voltage terminal, and a second electrode of the first transistor is electrically connected to the driving control node;
a control electrode of the second transistor is electrically connected to the compensation control line, a first electrode of the second transistor is electrically connected to the driving control node, and a second electrode of the second transistor is electrically connected to the first node;
the first transistor is a low temperature polysilicon thin film transistor, the second transistor is an oxide thin film transistor, the compensation control line is a first scan line in an nth row, and the initial control line is a second scan line in an (n−1)th row, or the second transistor is a low temperature polysilicon thin film transistor, the first transistor is an oxide thin film transistor, the initial control line is a first scan line in the (n−1)th row, and the compensation control line is a second scan line in the nth row; n is a positive integer.

### Claim 3 (depends on 2)

The pixel circuit according to claim 2, wherein, when the first transistor is the low temperature polysilicon thin film transistor and the second transistor is the oxide thin film transistor, the first transistor is a dual-gate transistor;
when the second transistor is the low temperature polysilicon thin film transistor and the first transistor is the oxide thin film transistor, the second transistor is a double-gate transistor.

### Claim 4 (depends on 3)

The pixel circuit according to claim 3, further comprising a light emitting element, a first light emitting control circuit and a second initialization circuit;
the first light emitting control circuit is electrically connected to a light emitting control line, the first node and a first electrode of the light emitting element, and is configured to, under the control of a light emitting control signal provided by the light emitting control line, control the first node to be connected to the first electrode of the light emitting element;
the second initialization circuit is electrically connected to the writing-in control line, the first electrode of the light emitting element and a second initial voltage terminal, and is configured to control the second initial voltage terminal to write a second initial voltage into the first electrode of the light emitting element under the control of a writing-in control signal provided by the writing-in control line;
a second electrode of the light emitting element is electrically connected to a first voltage terminal.

### Claim 5 (depends on 2)

The pixel circuit according to claim 2, further comprising a light emitting element, a first light emitting control circuit and a second initialization circuit;
the first light emitting control circuit is electrically connected to a light emitting control line, the first node and a first electrode of the light emitting element, and is configured to, under the control of a light emitting control signal provided by the light emitting control line, control the first node to be connected to the first electrode of the light emitting element;
the second initialization circuit is electrically connected to the writing-in control line, the first electrode of the light emitting element and a second initial voltage terminal, and is configured to control the second initial voltage terminal to write a second initial voltage into the first electrode of the light emitting element under the control of a writing-in control signal provided by the writing-in control line;
a second electrode of the light emitting element is electrically connected to a first voltage terminal.

### Claim 6 (depends on 1)

The pixel circuit according to claim 1, wherein a first electrode of the third transistor is electrically connected to the first initial voltage terminal;
a first electrode of the first transistor is electrically connected to a second electrode of the third transistor, and a second electrode of the first transistor is electrically connected to the driving control node;
a first electrode of the second transistor is electrically connected to the driving control node, and the second electrode of the second transistor is electrically connected to the first node;
the first transistor is a low temperature thin film polysilicon transistor, and both the second transistor and the third transistor are oxide thin film transistors.

### Claim 7 (depends on 6)

The pixel circuit according to claim 6, further comprising a light emitting element, a first light emitting control circuit and a second initialization circuit;
the first light emitting control circuit is electrically connected to a light emitting control line, the first node and a first electrode of the light emitting element, and is configured to, under the control of a light emitting control signal provided by the light emitting control line, control the first node to be connected to the first electrode of the light emitting element;
the second initialization circuit is electrically connected to the writing-in control line, the first electrode of the light emitting element and a second initial voltage terminal, and is configured to control the second initial voltage terminal to write a second initial voltage into the first electrode of the light emitting element under the control of a writing-in control signal provided by the writing-in control line;
a second electrode of the light emitting element is electrically connected to a first voltage terminal.

### Claim 8 (depends on 1)

The pixel circuit according to claim 1, wherein a first electrode of the first transistor is electrically connected to the first initial voltage terminal;
a first electrode of the third transistor is electrically connected to a second electrode of the first transistor, and a second electrode of the third transistor is electrically connected to the driving control node;
a first electrode of the second transistor is electrically connected to the driving control node, and a second electrode of the second transistor is electrically connected to the first node;
the first transistor is a low temperature thin film polysilicon transistor, and both the second transistor and the third transistor are oxide thin film transistors.

### Claim 9 (depends on 8)

The pixel circuit according to claim 8, further comprising a light emitting element, a first light emitting control circuit and a second initialization circuit;
the first light emitting control circuit is electrically connected to a light emitting control line, the first node and a first electrode of the light emitting element, and is configured to, under the control of a light emitting control signal provided by the light emitting control line, control the first node to be connected to the first electrode of the light emitting element;
the second initialization circuit is electrically connected to the writing-in control line, the first electrode of the light emitting element and a second initial voltage terminal, and is configured to control the second initial voltage terminal to write a second initial voltage into the first electrode of the light emitting element under the control of a writing-in control signal provided by the writing-in control line;
a second electrode of the light emitting element is electrically connected to a first voltage terminal.

### Claim 10 (depends on 1)

The pixel circuit according to claim 1, further comprising a light emitting element, a first light emitting control circuit and a second initialization circuit;
the first light emitting control circuit is electrically connected to a light emitting control line, the first node and a first electrode of the light emitting element, and is configured to, under the control of a light emitting control signal provided by the light emitting control line, control the first node to be connected to the first electrode of the light emitting element;
the second initialization circuit is electrically connected to the writing-in control line, the first electrode of the light emitting element and a second initial voltage terminal, and is configured to control the second initial voltage terminal to write a second initial voltage into the first electrode of the light emitting element under the control of a writing-in control signal provided by the writing-in control line;
a second electrode of the light emitting element is electrically connected to a first voltage terminal.

### Claim 11 (depends on 10)

The pixel circuit according to claim 10, wherein the first light emitting control circuit comprises a fifth transistor, and the second initialization circuit comprises a sixth transistor;
a control electrode of the fifth transistor is electrically connected to the light emitting control line, a first electrode of the fifth transistor is electrically connected to the first node, and a second electrode of the fifth transistor is electrically connected to the first electrode of the light emitting element;
a control electrode of the sixth transistor is electrically connected to the writing-in control line, a first electrode of the sixth transistor is electrically connected to the second initial voltage terminal, and a second electrode of the sixth transistor is electrically connected to the first electrode of the light emitting element;
both the fifth transistor and the sixth transistor are low temperature polysilicon thin film transistors.

### Claim 12 (depends on 10)

The pixel circuit according to claim 10, wherein the pixel circuit further comprises a driving circuit, a second light emitting control circuit and an energy storage circuit;
a control terminal of the driving circuit is electrically connected to the driving control node, a first terminal of the driving circuit is electrically connected to a second node, and a second terminal of the driving circuit is electrically connected to the first node, and the driving circuit is used to generate a driving current under the control of a potential of the control terminal of the driving circuit;
the second light emitting control circuit is electrically connected to the light emitting control line, a second voltage terminal and the second node, and is configured to, under the control of the light emitting control signal provided by the light emitting control line, control the second voltage terminal to be connected to the second node;
a first terminal of the energy storage circuit is electrically connected to the second voltage terminal, a second terminal of the energy storage circuit is electrically connected to the driving control node, and the energy storage circuit is configured to store electrical energy.

### Claim 13 (depends on 12)

The pixel circuit according to claim 12, wherein the driving circuit comprises a driving transistor, the second light emitting control circuit comprises an eighth transistor, and the energy storage circuit comprises a storage capacitor;
a control electrode of the driving transistor is electrically connected to the driving control node, a first electrode of the driving transistor is electrically connected to the second node, and a second electrode of the driving transistor is electrically connected to the first node;
a first electrode of the seventh transistor is electrically connected to the data line, and a second electrode of the seventh transistor is electrically connected to the second node;
a control electrode of the eighth transistor is electrically connected to the light emitting control line, a first electrode of the eighth transistor is electrically connected to the second voltage terminal, and a second electrode of the eighth transistor is electrically connected to the second node;
a first terminal of the storage capacitor is electrically connected to the second voltage terminal, and a second terminal of the energy storage circuit is electrically connected to the driving control node;
the driving transistor, the seventh transistor and the eighth transistor are all low temperature polysilicon thin film transistors.

### Claim 14 (depends on 1)

A pixel driving method, applied to the pixel circuit according to claim 1, wherein the pixel driving method comprises:
in the initialization stage, under the control of the initial control signal provided by the initial control line, controlling, by the first initialization circuit, the first initial voltage terminal to write the first initial voltage into the driving control node;
in the data writing-in stage, under the control of the compensation control signal provided by the compensation control line, controlling, by the compensation circuit, the driving control node to be connected to the first node.

### Claim 15 (depends on 14)

The pixel driving method according to claim 14, wherein the pixel circuit further comprises a light emitting element, a first light emitting control circuit, and a second initialization circuit; the display period further comprises a light emitting stage set after the data writing-in stage; the pixel driving method further comprises:
in the data writing-in stage, under the control of a writing-in control signal, controlling, by the second initialization circuit, the second initial voltage terminal to write a second initial voltage into a first electrode of the light emitting element;
in the light emitting stage, under the control of a light emitting control signal provided by the light emitting control line, controlling, by the first light emitting control circuit, the first node to be connected to the first electrode of the light emitting element.

### Claim 16 (depends on 1)

A display device comprising the pixel circuit according to claim 1.