# US 12,190,797 B2 · Pixel and display apparatus of which static power consumption is reduced

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- Number: US 12,190,797 B2
- Document ID: US12190797B2
- Status: Granted
- Kind: B2
- Application number: 18/498,244
- Filed: 2023-10-31
- Published: 2024-02-22
- Granted: 2025-01-07
- Earliest claimed: 2022-05-06
- Assignees: Sapien Semiconductors Inc.
- Applicants: Sapien Semiconductors Inc.
- Inventors: Sung Ho Hwang; Ji Haeng Lee; Hye Min Bae; Dae Young Jung
- Web page: https://patentgrep.com/patent/US12190797B2

## CPC

- G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED]
- G09G 3/3241: the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
- G09G 3/2014: {by modulation of the duration of a single pulse during which the logic level remains constant}
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2300/0852: being a dynamic memory with more than one capacitor
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage
- G09G 2310/062: Waveforms for resetting a plurality of scan lines at a time
- G09G 2310/066: Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
- G09G 2330/021: Power management, e.g. power saving
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

Provided is a pixel driving circuit including a first circuit configured to control, in a data writing mode, a signal related to driving of one or more light-emitting elements, and a second circuit configured to supply, in a driving mode, power to the one or more light-emitting elements based on a signal transmitted from the first circuit.

## Claims

### Claim 1

A pixel driving circuit for driving a luminous element by a pulse width modulation (PWM) operation, the pixel driving circuit comprising:
a first memory configured to store multi-digit bit values of image data;
a driver connected to the luminous element and configured to control a power supply to the luminous element according to each bit value of the image data, wherein the driver including a capacitor for charging a voltage required for driving the luminous element;
a bias circuit configured to supply and not to supply power to the capacitor of the driver according to each bit value of the image data; and
a controller configured to:
control the bias circuit to supply the power to charge the capacitor when each digit of the image data stored in the first memory has a bit value of 1; and
control the bias circuit not to supply the power to the capacitor when each digit of the image data stored in the first memory has a bit value of 0.

### Claim 2

A pixel driving circuit for driving a luminous element by a pulse width modulation (PWM) operation, the pixel driving circuit comprising:
a first memory configured to store bit values of image data;
a driver connected to the luminous element and configured to control a power supply to the luminous element according to the image data, wherein the driver including a capacitor for charging a voltage required for driving the luminous element;
a second memory configured to store bit values of charging control data that is a maximum number of times the capacitor is charged during one period;
a bias circuit configured to supply a power to the driver; and
a controller configured to operate the bias circuit for supplying the power only in response to the image data stored in the first memory having a bit value of 1,
wherein the driver comprises:
a charging transistor configured to supply the power from the bias circuit to the capacitor;
a discharging transistor configured to supply the power to the luminous element by discharging the stored power in the capacitor; and
a switch between the charging transistor and the capacitor;
wherein the capacitor is connected between the switch and a gate terminal of the discharging transistor, and the charging or discharging of the power in the capacitor are controlled by controlling on or off the switch.

### Claim 3 (depends on 1)

The pixel driving circuit of claim 1, wherein the controller configured not to operate the bias circuit when each digit of the multi-digit bit values of the image data stored in the first memory has a bit value of 0, so that the power supplying to the capacitor is cut off.

### Claim 4 (depends on 1)

The pixel driving circuit of claim 1, further comprising:
a second memory configured to store bit values of charging control data that indicates a maximum number of times the capacitor is to be charged during one period,
wherein
when the number of times of operating the bias circuit reaches the maximum number of times defined by the bit values stored in the second memory, the bias circuit is not operated with respect to lower bits thereafter.

### Claim 5 (depends on 4)

The pixel driving circuit of claim 4, wherein the one period is one PWM cycle or a single frame.
