# US 12,190,787 B2 · Display device preliminary class > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,190,787 B2 - Document ID: US12190787B2 - Status: Granted - Kind: B2 - Application number: 18/502,897 - Filed: 2023-11-06 - Published: 2024-07-04 - Granted: 2025-01-07 - Earliest claimed: 2022-12-30 - Assignees: LG Display Co., Ltd. - Applicants: LG Display Co., Ltd. - Inventors: JaeYeong Go; Taegung Kim; DongJun You; HwakDong Park - Web page: https://patentgrep.com/patent/US12190787B2 ## CPC - G09G 3/2096: {Details of the interface to the display terminal specific for a flat panel (suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167)} - G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} - G09G 2310/0243: Details of the generation of driving signals - G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays - G09G 2310/0275: Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G 2320/0247: Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes - G09G 2330/021: Power management, e.g. power saving - G09G 2340/0435: Change or adaptation of the frame rate of the video stream - G09G 2360/02: Graphics controller able to handle multiple formats, e.g. input or output formats - G09G 2360/12: Frame memory handling - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A display apparatus includes a display panel including a plurality of pixels; a timing controller generating image data, a data control signal, and a gate control signal, based on an input image signal and an input control signal; a data driver generating a data signal for an output image based on the image data and the data control signal and supplying the data signal to the pixels; a gate driver generating a gate signal based on the gate control signal and supplying the gate signal for the output image to the pixels. The timing controller detects a frame period corresponding to a frame rate of the input image and when the detected frame period is longer than the critical period, inserts a sub frame duration to output active data for image refresh after outputting active data of an output frame duration corresponding to the output image. ## Claims ### Claim 1 A display apparatus, comprising: a display panel including a plurality of pixels; a timing controller configured to generate image data, a data control signal, and a gate control signal based on an input image signal and an input control signal for an input image; a data driver configured to generate a data signal for an output image based on the image data and the data control signal and supplies the data signal to the plurality of pixels; and a gate driver configured to generate a gate signal based on the gate control signal and supply the gate signal for the output image to the plurality of pixels, wherein the timing controller is further configured to: detect a frame period corresponding to a frame rate of the input image, compare the detected frame period and a critical period, and responsive to determining that the detected frame period is longer than the critical period based on the comparison, insert a sub frame duration to output active data for image refresh after outputting active data of an output frame duration corresponding to the output image. ### Claim 2 (depends on 1) The display apparatus according to claim 1, wherein the output frame duration corresponding to the output image is delayed by a predetermined duration from an input frame duration corresponding to the input image. ### Claim 3 (depends on 2) The display apparatus according to claim 2, wherein the critical period is determined based on a maximum period and a minimum period of the frame period. ### Claim 4 (depends on 3) The display apparatus according to claim 3, wherein the critical period is determined within a range between twice the minimum period and the maximum period. ### Claim 5 (depends on 3) The display apparatus according to claim 3, wherein responsive to an end point of the input frame duration corresponding to the input image not being detected during a period corresponding to the critical period, the timing controller inserts the sub frame duration into the output frame duration. ### Claim 6 (depends on 5) The display apparatus according to claim 5, wherein responsive to an end point of the input frame duration corresponding to the input image not being detected during a period corresponding to the minimum period after the period corresponding to the critical period, the timing controller further inserts the sub frame duration in the output frame duration. ### Claim 7 (depends on 3) The display apparatus according to claim 3, wherein responsive to an end point of the input frame duration corresponding to the input image being detected during a period corresponding to the critical period, the timing controller does not insert the sub frame duration in the output frame duration. ### Claim 8 (depends on 5) The display apparatus according to claim 5, wherein the timing controller detects an end point of the input frame duration depending on whether active data of an input frame duration after the input frame duration is input during a period corresponding to the critical period based on the input image signal. ### Claim 9 (depends on 5) The display apparatus according to claim 5, wherein the timing controller detects an end point of the input frame duration depending on whether a pulse of a vertical synchronization signal which is included in the input control signal is applied during the period corresponding to the critical period based on the vertical synchronization signal. ### Claim 10 (depends on 3) The display apparatus according to claim 3, wherein when the sub frame duration is inserted in the output frame duration, the output frame duration includes a plurality of sub frame durations each including a display period for outputting the active data. ### Claim 11 (depends on 10) The display apparatus according to claim 10, wherein the active data which is output during the plurality of sub frame durations includes the same active data. ### Claim 12 (depends on 10) The display apparatus according to claim 10, wherein at least one sub frame duration, among the plurality of sub frame durations further includes a blank period. ### Claim 13 (depends on 12) The display apparatus according to claim 12, wherein a length of the blank period is determined based on the detected frame period. ### Claim 14 (depends on 13) The display apparatus according to claim 13, wherein a sum of the length of the blank period and lengths of the display periods included in the plurality of sub frame durations corresponds to a length of the detected frame period. ### Claim 15 (depends on 3) The display apparatus according to claim 3, wherein the timing controller includes: a frame memory configured to store the input image signal; an image signal processor configured to convert the input image signal output from the frame memory into the image data; a control signal generator configured to generate the data control signal and the gate control signal based on the input control signal; and a refresh rate controller configured to generate a first frequency control signal for controlling the control signal generator and a second frequency control signal for controlling the image signal processor. ### Claim 16 (depends on 15) The display apparatus according to claim 15, wherein the frame memory is configured to store the input image signal and delay the input image signal by the predetermined duration to output the delayed input image signal. ### Claim 17 (depends on 15) The display apparatus according to claim 15, wherein output frequencies of the data control signal and the gate control signal which are output from the control signal generator are determined based on the first frequency control signal, and an output frequency of the image data output from the image signal processor is determined based on the second frequency control signal. ### Claim 18 (depends on 15) The display apparatus according to claim 15, wherein the refresh rate controller includes: a critical period determiner circuit configured to determine the critical period based on the maximum period and the minimum period of the frame period to generate critical period information; a detector circuit configured to detect the frame period corresponding to the frame rate of the input image and compare the detected frame period and the critical period based on the critical period information to generate a detection result signal; and a frequency control signal generator circuit configured to generate the first frequency control signal and the second frequency control signal in response to the detection result signal. ### Claim 19 (depends on 18) The display apparatus according to claim 18, wherein the critical period is determined by the input of a user. ### Claim 20 (depends on 18) The display apparatus according to claim 18, wherein the critical period is a predetermined value.