# US 12,190,783 B2 · Current control circuit, display panel driving device and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,190,783 B2 - Document ID: US12190783B2 - Status: Granted - Kind: B2 - Application number: 17/926,735 - Filed: 2021-12-30 - Published: 2024-07-18 - Granted: 2025-01-07 - Earliest claimed: 2021-10-14 - Assignees: Hkc Corporation Limited - Applicants: Hkc Corporation Limited - Inventors: Renjie Zhou; Baohong Kang - Web page: https://patentgrep.com/patent/US12190783B2 ## CPC - G09G 3/2096: {Details of the interface to the display terminal specific for a flat panel (suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167)} - G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} - G09G 3/36: using liquid crystals - G09G 2310/0291: Details of output amplifiers or buffers arranged for use in a driving circuit - G09G 2330/02: Details of power systems and of start or stop of display operation - G09G 2330/025: Reduction of instantaneous peaks of current - G09G 2330/027: Arrangements or methods related to powering off a display - G09G 2330/04: Display protection - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A current control circuit, which includes an energy storage unit, a first switch unit, and a pulse width modulation unit. A first end of the energy storage unit is connected to a first preset voltage terminal V1 through the first switch unit, the first end of the energy storage unit is further connected to a first signal output of the level conversion chip so as to input a high level signal. A second end of the energy storage unit is connected to other signal outputs of the level conversion chip. The pulse width modulation unit is configured to modulate a duty cycle of the first switch unit. The current control circuit can accurately control the magnitude of the current in the display panel after a power-off instruction is received by the display device, thereby protecting the display panel. ## Claims ### Claim 1 A current control circuit applied to a display panel driving device, comprising: a level conversion chip, the level conversion chip has a plurality of signal outputs, a plurality of signal outputs of the level conversion chip are configured to be connected to a plurality of signal inputs of the display panel in a one-to-one correspondence manner; a high level signal is output through a first signal output in a plurality of signal outputs of the level conversion chip when the level conversion chip receives a power-off instruction; wherein the current control circuit comprises an energy storage unit, a first switch unit, and a pulse width modulation unit; a first end of the energy storage unit is configured to be connected to the first signal output of the level conversion chip to receive the high level signal, a second end of the energy storage unit is configured to be connected to at least one second signal output of the level conversion chip, and the second signal output is other signal output(s) other than the first signal output in a plurality of signal outputs of the level conversion chip; a first end of the first switch unit is configured to be connected to a first preset voltage terminal, a second end of the first switch unit is connected to a first end of the energy storage unit, and a control end of the first switch unit is connected to an output of the pulse width modulation unit; and an output of the pulse width modulation unit is configured to output a pulse width modulation signal used for controlling a duty cycle of the first switch unit, and thereby controlling a magnitude of a voltage at a first end of the energy storage unit and a magnitude of a current in the energy storage unit. ### Claim 2 (depends on 1) The current control circuit as in claim 1, wherein the current control circuit further comprises a second switch unit and a comparator; wherein a first end of the second switch unit is configured to be connected to the first signal output of the level conversion chip, a second end of the second switch unit is connected to a first end of the energy storage unit; and a first input of the comparator is configured to be connected to a first signal output of the level conversion chip; a second input of the comparator is configured to be connected to a second preset voltage terminal; a voltage at the second preset voltage terminal is lower than a voltage of the high level signal; an output of the comparator is connected to a control end of the second switch unit, so that the comparator controls the second switch unit to be switched-on when the high level signal is received at the first input of the comparator. ### Claim 3 (depends on 2) The current control circuit as in claim 2, wherein the comparator comprises: a resistance R1, a resistance R2 and an operational amplifier A1; wherein a first end of the resistance R1 is configured to be connected to a first signal output of the level conversion chip; a first end of the resistance R2 is connected to a second end of the resistance R1, and a second end of the resistance R2 is configured to be connected to the second preset voltage terminal; and a non-inverting input of the operational amplifier A1 is connected to the second end of the resistance R1, an inverting input of the operational amplifier A1 is connected to the second end of the resistance R2, and an output of the operational amplifier A1 is connected to the control end of the second switch unit. ### Claim 4 (depends on 2) The current control circuit as in claim 2, wherein the second switch unit comprises a transistor M1; and wherein a gate electrode of the transistor M1 is connected to an output of the comparator, a drain electrode of the transistor M1 is configured to be connected to the first signal output of the level conversion chip, and a source electrode of the transistor M1 is connected to the first end of the energy storage unit. ### Claim 5 (depends on 4) The current control circuit as in claim 4, wherein when a high level signal is received at the gate electrode of the transistor M1, a conductivity between the source electrode and the drain electrode of the transistor M1 is enabled. ### Claim 6 (depends on 2) The current control circuit as in claim 2, further comprising a third switch unit; and wherein a first end of the third switch unit is configured to be connected to the first signal output of the level conversion chip, a second end of the third switch unit is connected to the second end of the energy storage unit, and a control end of the third switch unit is connected to the output of the comparator, so that the comparator controls the third switch unit to be switched-on when a low level signal is received at the first input of the comparator. ### Claim 7 (depends on 6) The current control circuit as in claim 6, wherein the third switch unit comprises a transistor M2; and wherein a gate electrode of the transistor M2 is connected to an output of the comparator, a source electrode of the transistor M2 is configured to be connected to the first signal output of the level conversion chip, and a drain electrode of the transistor M2 is connected to the second end of the energy storage unit. ### Claim 8 (depends on 7) The current control circuit as in claim 7, wherein when a low level signal is received at the gate electrode of the transistor M2, a conductivity between the source electrode and the drain electrode of the transistor M2 is enabled. ### Claim 9 (depends on 2) The current control circuit as in claim 2, wherein the second preset voltage terminal is a ground wire. ### Claim 10 (depends on 1) The current control circuit as in claim 1, further comprising: a Zener diode D1; wherein an anode of the Zener diode D1 is configured to be connected to the second preset voltage terminal, a voltage of the second preset voltage terminal is lower than a voltage of the first preset voltage terminal, and a cathode of the Zener diode D1 is connected to the first end of the first switch unit. ### Claim 11 (depends on 1) The current control circuit as in claim 1, further comprising a diode D2; wherein an anode of the diode D2 is configured to be connected to the first signal output of the level conversion chip, and a cathode of the diode D2 is connected to the first end of the energy storage unit. ### Claim 12 (depends on 1) The current control circuit as in claim 1, wherein the first switch unit further comprises a transistor M3; and wherein a gate electrode of the transistor M3 is connected to an output of the pulse width modulation unit, a drain electrode of the transistor M3 is connected to the first preset voltage terminal, and a source electrode of the transistor M3 is connected to the first end of the energy storage unit. ### Claim 13 (depends on 12) The current control circuit as in claim 12, wherein when a high level signal is received at the gate electrode of the transistor M3, a conductivity between the source electrode and the drain electrode of the transistor M3 is enabled. ### Claim 14 (depends on 1) The current control circuit as in claim 1, wherein the energy storage unit comprises an inductance L1; and wherein a first end of the inductance L1 is configured to be connected to the first signal output of the level conversion chip and the second end of the first switch unit, and a second end of the inductance L1 is configured to be connected to the at least one second signal output of the level conversion chip. ### Claim 15 A display panel driving device, comprising: a level conversion chip and a current control circuit; wherein the current control circuit comprises energy storage unit, a first switch unit, and a pulse width modulation unit; a first end of the energy storage unit is configured to be connected to a first signal output of the level conversion chip to receive the high level signal, a second end of the energy storage unit is configured to be connected to at least one second signal output of the level conversion chip, and the second signal output is other signal output(s) other than the first signal output in a plurality of signal outputs of the level conversion chip; a first end of the first switch unit is configured to be connected to a first preset voltage terminal, a second end of the first switch unit is connected to a first end of the energy storage unit, and a control end of the first switch unit is connected to an output of the pulse width modulation unit; an output of the pulse width modulation unit is configured to output a pulse width modulation signal used for controlling a duty cycle of the first switch unit, and thereby controlling a magnitude of a voltage at a first end of the energy storage unit and a magnitude of a current in the energy storage unit; and wherein the level conversion chip has a plurality of signal outputs configured to be connected to a plurality of signal inputs of the display panel in a one-to-one correspondence manner; when the level conversion chip receives a power-off instruction, a high level signal is output through a first signal output of a plurality of signal outputs of the level conversion chip. ### Claim 16 (depends on 15) A display device, comprising: a display panel and the display panel driving device according to claim 15; wherein the display panel has a plurality of signal inputs, the level conversion chip has a plurality of signal outputs, and the plurality of signal outputs of the level conversion chip are connected to the plurality of signal inputs of the display panel in one-to-one correspondence manner; when the level conversion chip receives a power-off instruction, a high level signal is output through a first signal output of a plurality of signal outputs of the level conversion chip. ### Claim 17 (depends on 15) The display panel driving device as in claim 15, wherein the current control circuit further comprises a second switch unit and a comparator; and wherein a first end of the second switch unit is configured to be connected to the first signal output of the level conversion chip, and a second end of the second switch unit is connected to a first end of the energy storage unit; and a first input of the comparator is configured to be connected to a first signal output of the level conversion chip; a second input of the comparator is configured to be connected to a second preset voltage terminal; wherein a voltage at the second preset voltage terminal is lower than a voltage of the high level signal; an output of the comparator is connected to a control end of the second switch unit, so that the comparator controls the second switch unit to be switched-on when the high level signal is received at the first input of the comparator. ### Claim 18 (depends on 17) The display panel driving device as in claim 17, wherein the comparator comprises: a resistance R1, a resistance R2 and an operational amplifier A1; wherein a first end of the resistance R1 is configured to be connected to a first signal output of the level conversion chip; a first end of the resistance R2 is connected to a second end of the resistance R1, and a second end of the resistance R2 is configured to be connected to the second preset voltage terminal; and a non-inverting input of the operational amplifier A1 is connected to the second end of the resistance R1, an inverting input of the operational amplifier A1 is connected to the second end of the resistance R2, and an output of the operational amplifier A1 is connected to the control end of the second switch unit. ### Claim 19 (depends on 17) The display panel driving device as in claim 17, wherein the second switch unit comprises a transistor M1; and wherein a gate electrode of the transistor M1 is connected to an output of the comparator, a drain electrode of the transistor M1 is configured to be connected to the first signal output of the level conversion chip, and a source electrode of the transistor M1 is connected to the first end of the energy storage unit. ### Claim 20 (depends on 17) The display panel driving device as in claim 17, wherein the current control circuit further comprises a third switch unit; wherein a first end of the third switch unit is configured to be connected to the first signal output of the level conversion chip, a second end of the third switch unit is connected to the second end of the energy storage unit, and a control end of the third switch unit is connected to the output of the comparator, so that the comparator controls the third switch unit to be switched-on when a low level signal is received at the first input of the comparator.