# US 12,190,775 B2 · Pixel circuit and driving method therefor, display substrate, and display apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,190,775 B2 - Document ID: US12190775B2 - Status: Granted - Kind: B2 - Application number: 18/273,201 - Filed: 2022-07-08 - Published: 2024-05-09 - Granted: 2025-01-07 - Earliest claimed: 2021-07-30 - Assignees: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd. - Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd.; BOE Technology Group Co., Ltd. - Inventors: Xinyu Wei; Kai Zhang; Qiang Fu; Gang Wang; Erlong Song; Hongmei Fan; Kunyan Shi - Web page: https://patentgrep.com/patent/US12190775B2 ## CPC - G09G 3/2007: {Display of intermediate tones} - G09G 3/3225: using an active matrix - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/3258: with pixel circuitry controlling the voltage across the light-emitting element - H10K 59/131: Interconnections, e.g. wiring lines or terminals - G09G 2300/0408: Integration of the drivers onto the display substrate - G09G 2300/0426: Layout of electrodes and connections - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2300/0852: being a dynamic memory with more than one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/0254: Control of polarity reversal in general, other than for liquid crystal displays - G09G 2310/061: for resetting or blanking - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G 2320/0247: Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes - G09G 2320/0252: Improving the response speed - G09G 2320/0257: Reduction of after-image effects - G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements - G09G 2320/0626: for control of overall brightness - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES ## Abstract A pixel circuit and a driving method therefor, a display substrate, and a display apparatus. The pixel circuit includes a driving sub circuit, a data writing sub circuit, a first light-emitting control sub circuit, a first reset sub circuit, and a bias sub circuit; the first reset sub circuit is connected to a first node and configured to write a first reset voltage to the first node in response to a first reset control signal; and the bias sub circuit is connected to a second node and configured to write a reference voltage to the second node in response to a bias control signal, thereby turning on the driving sub circuit. ## Claims ### Claim 1 A pixel circuit, comprising: a driving sub-circuit, comprising a control terminal connected to a first node, a first terminal connected to a second node, and a second terminal connected to a third node, and configured to control according to a voltage of the control terminal a driving current which flows from the second node to the third node and is used for driving a light emitting element; a data writing sub-circuit, connected to the second node and configured to write a data signal to the second node in response to a first scanning signal; a first light emitting control sub-circuit, connected to the second node and a first power voltage terminal and configured to write a first power voltage from the first power voltage terminal to the second node in response to a first light emitting control signal; a first reset sub-circuit, connected to the first node and configured to write a first reset voltage to the first node in response to a first reset control signal; and a bias sub-circuit, connected to the second node and configured to write a reference voltage to the second node in response to a bias control signal to switch on the driving sub-circuit, wherein an absolute value of a voltage difference between the reference voltage and the first reset voltage is a preset value, and wherein the preset value is set such that an absolute value of a voltage difference between the control terminal and the first terminal of the driving sub-circuit is less than the preset value when the light emitting element is driven to emit light with a brightness of a highest gray level. ### Claim 2 (depends on 1) The pixel circuit according to claim 1, further comprising a second reset sub-circuit, wherein the second reset sub-circuit is connected to a fourth node and configured to be connected to a first electrode of the light emitting element through the fourth node and to write a second reset voltage to the fourth node in response to a second reset control signal. ### Claim 3 (depends on 2) The pixel circuit according to claim 2, wherein the bias control signal and the second reset control signal are a same signal. ### Claim 4 (depends on 1) The pixel circuit according to claim 1, further comprising a second light emitting control sub-circuit, wherein the second light emitting control sub-circuit is connected to the third node and a fourth node and configured to be connected to a first electrode of the light emitting element through the fourth node, and the second light emitting control sub-circuit is configured to switch on the first node and the fourth node in response to a second light emitting control signal. ### Claim 5 (depends on 1) The pixel circuit according to claim 1, further comprising a compensation sub-circuit, wherein the compensation sub-circuit is connected to the first node and the third node and configured to switch on the first node and the third node in response to a second scanning signal to control the driving sub-circuit to write a compensating voltage to the first node based on the data signal written into the second node. ### Claim 6 (depends on 1) The pixel circuit according to claim 1, further comprising a storage sub-circuit, wherein the storage sub-circuit comprises a first terminal and a second terminal which are connected to the first power voltage terminal and the first node, respectively. ### Claim 7 (depends on 1) The pixel circuit according to claim 1, wherein the bias sub-circuit comprises a bias transistor, and the first reset sub-circuit comprises a reset transistor; and the bias transistor is a P-type transistor, and the reset transistor is an N-type transistor. ### Claim 8 A display substrate, comprising: a base substrate; and a plurality of sub-pixels distributed in an array on the base substrate in a first direction and a second direction, wherein at least one of the plurality of sub-pixels comprises a pixel circuit comprising: a driving sub-circuit, comprising a control terminal connected to a first node, a first terminal connected to a second node, and a second terminal connected to a third node, and configured to control according to a voltage of the control terminal a driving current which flows from the second node to the third node and is used for driving a light emitting element; a data writing sub-circuit, connected to the second node and configured to write a data signal to the second node in response to a first scanning signal; a first light emitting control sub-circuit, connected to the second node and a first power voltage terminal and configured to write a first power voltage from the first power voltage terminal to the second node in response to a first light emitting control signal; a first reset sub-circuit, connected to the first node and configured to write a first reset voltage to the first node in response to a first reset control signal; and a bias sub-circuit, connected to the second node and configured to write a reference voltage to the second node in response to a bias control signal to switch on the driving sub-circuit, the display substrate further comprises a bias control line extended in the first direction, the bias sub-circuit comprises a bias transistor, and the bias control line is electrically connected to a gate electrode of the bias transistor to provide the bias control signal. ### Claim 9 (depends on 8) The display substrate according to claim 8, further comprising a reference voltage line, wherein the reference voltage line is electrically connected to a first electrode of the bias transistor to provide the reference voltage, and wherein the reference voltage line is on a side, away from the base substrate, of the bias control line. ### Claim 10 (depends on 8) The display substrate according to claim 8, further comprising a connection electrode, wherein a second electrode of the bias transistor is electrically connected to the first terminal of the driving sub-circuit through the connection electrode, and wherein the connection electrode is on a side, away from the base substrate, of the bias control line. ### Claim 11 (depends on 8) The display substrate according to claim 8, wherein the pixel circuit further comprises a second reset sub-circuit, and the second reset sub-circuit is connected to a fourth node and configured to be connected to a first electrode of the light emitting element through the fourth node and to write a second reset voltage to the fourth node in response to a second reset control signal, and the bias sub-circuit and the second reset sub-circuit are on a same side of the driving sub-circuit in the second direction. ### Claim 12 (depends on 11) The display substrate according to claim 11, wherein the second reset sub-circuit comprises a reset transistor; and the bias control line is further electrically connected to a gate electrode of the reset transistor to provide the second reset control signal. ### Claim 13 (depends on 8) The display substrate according to claim 8, wherein the first reset sub-circuit and the bias sub-circuit are on two opposite sides of the driving sub-circuit in the second direction. ### Claim 14 A display substrate, comprising: a base substrate; and a plurality of sub-pixels distributed in an array on the base substrate in a first direction and a second direction, wherein at least one of the plurality of sub-pixels comprises a pixel circuit comprising: a driving sub-circuit, comprising a control terminal connected to a first node, a first terminal connected to a second node, and a second terminal connected to a third node, and configured to control according to a voltage of the control terminal a driving current which flows from the second node to the third node and is used for driving a light emitting element; a data writing sub-circuit, connected to the second node and configured to write a data signal to the second node in response to a first scanning signal; a first light emitting control sub-circuit, connected to the second node and a first power voltage terminal and configured to write a first power voltage from the first power voltage terminal to the second node in response to a first light emitting control signal; a first reset sub-circuit, connected to the first node and configured to write a first reset voltage to the first node in response to a first reset control signal; and a bias sub-circuit, connected to the second node and configured to write a reference voltage to the second node in response to a bias control signal to switch on the driving sub-circuit, the display substrate further comprises a first reset control line extended in the first direction, wherein the first reset sub-circuit comprises a reset transistor, and the first reset control line is electrically connected to a gate electrode of the reset transistor to provide the first reset control signal. ### Claim 15 (depends on 14) The display substrate according to claim 14, further comprising a first reset voltage line extended in the first direction, wherein the first reset voltage line is electrically connected to a first electrode of the reset transistor to provide the first reset voltage. ### Claim 16 (depends on 15) The display substrate according to claim 15, wherein, in a direction perpendicular to the base substrate, the first reset voltage line is on a side, close to the base substrate, of an active layer of the reset transistor, and the first reset control line is on a side, away from the base substrate, of the active layer of the reset transistor. ### Claim 17 (depends on 8) A display apparatus, comprising the display substrate according to claim 8. ### Claim 18 (depends on 1) A driving method for the pixel circuit according to claim 1, comprising: at an initialization phase, switching on the first reset sub-circuit to write the first reset voltage to the first node and switching on the bias sub-circuit to write the reference voltage to the second node to switch on the driving sub-circuit; and at a data writing phase, switching on the data writing sub-circuit to write the data signal to the second node, wherein the initialization phase is prior to the data writing phase.