Command-differentiated storage of internally and externally sourced data
AssigneeRambus Inc.
InventorsThomas J. Sheffler, Lawrence Lai, Liang Peng, Bohuslav Rychlik
Life of this patent
Estimating the term…
Abstract
A memory device having a DRAM core and a register stores first data in the register before receiving first and second memory access commands via a command interface and before receiving second data via a data interface. The memory device responds to the first memory access command by writing the first data from the register to the DRAM core and responds to the second memory access command by writing the second data from the data interface to the DRAM core.
Claims20
A memory control component to control a memory integrated-circuit (IC) having a programmable register and a memory core, the memory control component comprising:
- a command/address interface;
- and
- control circuitry to output to the memory IC via the command/address interface:
- a register-write instruction and corresponding data values, the register-write instruction instructing the memory IC to store the data values within the programmable register;
- and
- a memory access command and an address value, the memory access command instructing the memory IC to write the data values, sourced from the programmable register, to the memory core at locations indicated by the address value.
A method of operation within a memory control component for controlling a memory integrated-circuit (IC) having a programmable register and a memory core, the method comprising:
- outputting a register-write instruction and corresponding data values to the memory IC via a command/address interface of the memory control component, the register-write instruction instructing the memory IC to store the data values within the programmable register;
- and
- outputting a memory access command and an address value to the memory IC via the command/address interface, the memory access command instructing the memory IC to write the data values, sourced from the programmable register, to the memory core at locations indicated by the address value.
A memory control component to control a memory integrated-circuit (IC) having a programmable register and a memory core, the memory control component comprising:
- a command/address interface;
- and
- means for outputting to the memory IC via the command/address interface:
- a register-write instruction and corresponding data values, the register-write instruction instructing the memory IC to store the data values within the programmable register;
- and
- a memory access command and an address value, the memory access command instructing the memory IC to write the data values, sourced from the programmable register, to the memory core at locations indicated by the address value.
Dependencies are inferred from the claim text.