Capacitive compensation for vertical interconnect accesses
AssigneeAchronix Semiconductor Corporation
InventorsHansel Desmond Dsilva, Sasikala J, Abhishek Jain, Amit Kumar
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AssigneeAchronix Semiconductor Corporation
InventorsHansel Desmond Dsilva, Sasikala J, Abhishek Jain, Amit Kumar
Estimating the term…
Multiple designs for a multi-layer circuit may be simulated to determine impedance profiles of each design, allowing a circuit designer to select a design based on the impedance profiles. One feature that can be modified is the structure surrounding the barrels of a differential VIA on layers that are not connected to the differential VIA. Specifically, one antipad can be used that surrounds both barrels or two antipads can be used, with one antipad for each barrel. Additionally, the size of the antipad or antipads can be modified. These modifications affect the impedance of the differential VIA. Additionally, a conductive region may be placed that connects to the VIA barrel even though the circuit on the layer does not connect to the VIA. This unused pad, surrounded by a non-conductive region, also affects the impedance of the differential VIA.
A fabricated circuit comprising:
Dependencies are inferred from the claim text.