# US 12,184,308 B2 · Interface circuit and method for providing DC bias voltage correction

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- Number: US 12,184,308 B2
- Document ID: US12184308B2
- Status: Granted
- Kind: B2
- Application number: 17/822,951
- Filed: 2022-08-29
- Published: 2023-12-28
- Granted: 2024-12-31
- Earliest claimed: 2022-06-23
- Assignees: NXP B.V.
- Applicants: NXP B.V.
- Inventors: Robert van Veldhoven
- Web page: https://patentgrep.com/patent/US12184308B2

## CPC

- H03M 3/464: {Details of the digital/analogue conversion in the feedback path}
- H03M 1/0626: {by filtering}
- H03M 1/1295: {Clamping, i.e. adjusting the DC level of the input signal to a predetermined value}
- H03M 3/344: {by filtering other than the noise-shaping inherent to delta-sigma modulators, e.g. anti-aliasing}
- H04R 3/00: Circuits for transducers (arrangements for producing a reverberation or echo sound G10K15/08; amplifiers H03F)
- H03F 3/45475: {using IC blocks as the active amplifying circuit}
- H04R 3/06: of electrostatic transducers
- H04R 2201/003: Mems transducers or their use
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- H04R: LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS (producing sounds with frequency not determined by supply frequency G10K)
- H03F: AMPLIFIERS

## Abstract

An interface circuit includes an analogue to digital converter having an input configured to receive an input signal having an unknown DC bias voltage via an input resistance and provide an output signal to an ADC feedback loop. The ADC feedback loop includes a digital filter arranged to digitally filter the fedback output signal. A digital to analogue converter (DAC) forming a DC feedback loop with the ADC and arranged to convert the digitally filtered fedback output signal to an analogue signal that is provided to the input of the ADC, wherein the analogue signal that is provided to the input of the ADC is arranged to include a DC bias component that is comparable to a DC bias component of a current of the input signal passing through the input resistor.

## Claims

### Claim 1

An interface circuit comprising:
an analogue to digital converter, ADC, having an input configured to receive an input signal having an unknown DC bias voltage via an input resistance and provide an output signal to an ADC feedback loop;
the ADC feedback loop comprising a digital filter arranged to digitally filter the feedback output signal, and
a digital to analogue converter, DAC, forming a DC feedback loop with the filter and arranged to convert the digitally filtered fed-back output signal to an analogue signal that is provided to the input of the ADC, wherein the analogue signal that is provided to the input of the ADC is arranged to comprise a DC bias component that is substantially equal to a DC bias component of a current of the input signal passing through the input resistor,
wherein the ADC is a sigma-delta ADC and the ADC feedback loop further comprises an AC feedback loop comprising at least one resistor, Rdac, connecting an output of the ADC to the input of the ADC,
wherein at a crossover frequency, a DC feedback loop gain is substantially equal to an AC feedback loop gain.

### Claim 2 (depends on 1)

The interface circuit of claim 1 wherein the input signal having an unknown DC bias voltage whereby the signal source is an input audio signal from an electret microphone or a micro-electrical-mechanical system, MEMS, microphone, or a signal source with a large DC bias.

### Claim 3

An interface circuit, comprising:
an analogue to digital converter, ADC, having an input configured to receive an input signal having an unknown DC bias voltage via an input resistance and provide an output signal to an ADC feedback loop;
the ADC feedback loop comprising a digital filter arranged to digitally filter the feedback output signal, and
a digital to analogue converter, DAC, forming a DC feedback loop with the filter and arranged to convert the digitally filtered fed-back output signal to an analogue signal that is provided to the input of the ADC, wherein the analogue signal that is provided to the input of the ADC is arranged to comprise a DC bias component that is substantially equal to a DC bias component of a current of the input signal passing through the input resistor,
wherein the ADC is a sigma-delta ADC and the ADC feedback loop further comprises an AC feedback loop comprising at least one resistor, Rdac, connecting an output of the ADC to the input of the ADC,
wherein at lower frequencies signals are rejected by the DC loop and at frequencies higher than the crossover frequency between the AC feedback loop and the DC feedback loop, the output signal passes through the sigma-delta ADC.

### Claim 4

An interface circuit, comprising:
an analogue to digital converter, ADC, having an input configured to receive an input signal having an unknown DC bias voltage via an input resistance and provide an output signal to an ADC feedback loop;
the ADC feedback loop comprising a digital filter arranged to digitally filter the feedback output signal, and
a digital to analogue converter, DAC, forming a DC feedback loop with the filter and arranged to convert the digitally filtered fed-back output signal to an analogue signal that is provided to the input of the ADC, wherein the analogue signal that is provided to the input of the ADC is arranged to comprise a DC bias component that is substantially equal to a DC bias component of a current of the input signal passing through the input resistor,
wherein the ADC is a sigma-delta ADC and the ADC feedback loop further comprises an AC feedback loop comprising at least one resistor, Rdac, connecting an output of the ADC to the input of the ADC, wherein the ADC is a sigma-delta ADC and the DC loop of the ADC feedback loop comprises:
a gain stage arranged to amplify the fed-back output signal of the sigma-delta ADC and provide an amplified fed-back output signal to the digital filter; and
the DAC is a noise shaping circuit connected to the digital filter, and arranged to provide the analogue signal to the input of the ADC,
wherein the noise shaping circuit is a second sigma delta modulator configured as a N-bit DAC, arranged to feed back the output signal to the input of the sigma delta ADC via the at least one resistor Rdac.

### Claim 5

An interface circuit, comprising:
an analogue to digital converter, ADC, having an input configured to receive an input signal having an unknown DC bias voltage via an input resistance and provide an output signal to an ADC feedback loop;
the ADC feedback loop comprising a digital filter arranged to digitally filter the feedback output signal, and
a digital to analogue converter, DAC, forming a DC feedback loop with the filter and arranged to convert the digitally filtered fed-back output signal to an analogue signal that is provided to the input of the ADC, wherein the analogue signal that is provided to the input of the ADC is arranged to comprise a DC bias component that is substantially equal to a DC bias component of a current of the input signal passing through the input resistor,
wherein the ADC is a sigma-delta ADC and the ADC feedback loop further comprises an AC feedback loop comprising at least one resistor. Rdac, connecting an output of the ADC to the input of the ADC, wherein the ADC is a sigma-delta ADC and the DC loop of the ADC feedback loop comprises:
a gain stage arranged to amplify the fed-back output signal of the sigma-delta ADC and provide an amplified fed-back output signal to the digital filter; and
the DAC is a noise shaping circuit connected to the digital filter, and arranged to provide the analogue signal to the input of the ADC,
wherein an output of the noise shaping circuit comprises a filtering DAC arranged to limit an amount of quantization noise at the output of the noise shaping circuit.

### Claim 6

An interface circuit, comprising:
an analogue to digital converter, ADC, having an input configured to receive an input signal having an unknown DC bias voltage via an input resistance and provide an output signal to an ADC feedback loop;
the ADC feedback loop comprising a digital filter arranged to digitally filter the feedback output signal, and
a digital to analogue converter, DAC, forming a DC feedback loop with the filter and arranged to convert the digitally filtered fed-back output signal to an analogue signal that is provided to the input of the ADC, wherein the analogue signal that is provided to the input of the ADC is arranged to comprise a DC bias component that is substantially equal to a DC bias component of a current of the input signal passing through the input resistor,
wherein the ADC is a sigma-delta ADC and the ADC feedback loop further comprises an AC feedback loop comprising at least one resistor, Rdac, connecting an output of the ADC to the input of the ADC, wherein the ADC is a sigma-delta ADC and the DC loop of the ADC feedback loop comprises:
a gain stage arranged to amplify the fed-back output signal of the sigma-delta ADC and provide an amplified fed-back output signal to the digital filter; and
the DAC is a noise shaping circuit connected to the digital filter, and arranged to provide the analogue signal to the input of the ADC,
wherein the sigma-delta ADC comprises an input node arranged to be a virtual ground node and receive the analogue signal from the DAC and receive the input signal having an unknown DC bias voltage where a current in the analogue signal is compensated by the current coming from the DAC.

### Claim 7 (depends on 6)

The interface circuit of claim 6 wherein the sigma-delta ADC comprises a loop filter for filtering a signal of a combination of the input signal having an unknown DC bias voltage and the analogue signal and a quantizer arranged to provide an output signal that switches between a logic ‘0’ and a supply voltage.

### Claim 8 (depends on 7)

The interface circuit of claim 7 wherein the loop filter is implemented by at least one of: a transconductance amplifier or operational amplifier and a feedback capacitor connecting an output of the transconductance amplifier to an inverting input of the transconductance amplifier.

### Claim 9 (depends on 7)

The interface circuit of claim 7 wherein the loop filter is implemented by a transconductance amplifier having an input connected to a grounded capacitor and an output connected to a shunt resistor-capacitor stage.

### Claim 10 (depends on 7)

The interface circuit of claim 7 wherein the loop filter is implemented by a grounded shunt capacitor coupled to a series resistance and a shunt resistor-capacitor stage.

### Claim 11

A method for removing an unknown DC bias voltage from an input signal the method comprising, at an interface circuit:
receiving the input signal having an unknown DC bias voltage by an analogue to digital converter, ADC, of the interface circuit via an input resistance;
forming a DC feedback loop with the ADC and a digital to analogue converter, DAC, and providing an output signal from the ADC to the DAC;
digitally filtering a fed-back output signal, and
converting, by the DAC the digitally filtered fed-back output signal to an analogue signal that is provided to the input of the ADC, wherein the analogue signal comprises a DC bias component that is substantially equal to a DC bias component of a current of the input signal passing through the input resistor,
wherein the ADC is a sigma-delta ADC and the ADC feedback loop further comprises an AC feedback loop comprising at least one resistor, Rdac, connecting an output of the ADC to the input of the ADC,
wherein at a crossover frequency, a DC feedback loop gain is substantially equal to an AC feedback loop gain.

### Claim 12

A method for removing an unknown DC bias voltage from an input signal the method comprising, at an interface circuit:
receiving the input signal having an unknown DC bias voltage by an analogue to digital converter, ADC, of the interface circuit via an input resistance;
forming a DC feedback loop with the ADC and a digital to analogue converter, DAC. and providing an output signal from the ADC to the DAC;
digitally filtering a fed-back output signal;
converting, by the DAC the digitally filtered fed-back output signal to an analogue signal that is provided to the input of the ADC, wherein the analogue signal comprises a DC bias component that is substantially equal to a DC bias component of a current of the input signal passing through the input resistor, wherein the ADC is a sigma-delta ADC and the ADC feedback loop further comprises an AC feedback loop comprising at least one resistor, Rdac, connecting an output of the ADC to the input of the ADC;
rejecting at lower frequencies signals by the DC loop; and
allowing output signals to pass through the sigma-delta ADC at frequencies higher than the crossover frequency between the AC feedback loop and the DC feedback loop.

### Claim 13

A method for removing an unknown DC bias voltage from an input signal the method comprising, at an interface circuit:
receiving the input signal having an unknown DC bias voltage by an analogue to digital converter, ADC, of the interface circuit via an input resistance;
forming a DC feedback loop with the ADC and a digital to analogue converter, DAC. and providing an output signal from the ADC to the DAC;
digitally filtering a fed-back output signal;
converting, by the DAC the digitally filtered fed-back output signal to an analogue signal that is provided to the input of the ADC, wherein the analogue signal comprises a DC bias component that is substantially equal to a DC bias component of a current of the input signal passing through the input resistor. wherein the ADC is a sigma-delta ADC and the ADC feedback loop further comprises an AC feedback loop comprising at least one resistor, Rdac, connecting an output of the ADC to the input of the ADC.
wherein the ADC is a sigma-delta ADC, the method further comprising:
arranging a gain stage in the DC loop of the ADC feedback loop to amplify the fed-back output signal of the sigma-delta ADC;
providing an amplified fed-back output signal to the digital filter;
coupling a noise shaping circuit of the DAC to the digital filter; and
providing the analogue signal to the input of the ADC,
wherein the noise shaping circuit is a second sigma delta modulator configured as a N-bit DAC, and the method further comprises:
feeding back the output signal to the input of the sigma delta ADC via the at least one resistor Rdac.

### Claim 14

A method for removing an unknown DC bias voltage from an input signal the method comprising, at an interface circuit:
receiving the input signal having an unknown DC bias voltage by an analogue to digital converter, ADC, of the interface circuit via an input resistance;
forming a DC feedback loop with the ADC and a digital to analogue converter, DAC. and providing an output signal from the ADC to the DAC;
digitally filtering a fed-back output signal;
converting, by the DAC the digitally filtered fed-back output signal to an analogue signal that is provided to the input of the ADC, wherein the analogue signal comprises a DC bias component that is substantially equal to a DC bias component of a current of the input signal passing through the input resistor, wherein the ADC is a sigma-delta ADC and the ADC feedback loop further comprises an AC feedback loop comprising at least one resistor, Rdac, connecting an output of the ADC to the input of the ADC,
wherein the ADC is a sigma-delta ADC, the method further comprising:
arranging a gain stage in the DC loop of the ADC feedback loop to amplify the fed-back output signal of the sigma-delta ADC;
providing an amplified fed-back output signal to the digital filter;
coupling a noise shaping circuit of the DAC to the digital filter; and
providing the analogue signal to the input of the ADC,
wherein the method further comprises arranging an output of the noise shaping circuit to include a filtering DAC that limits an amount of quantization noise at the output of the noise shaping circuit.