# US 12,184,306 B2 · Polar coder for channel encoding chain for wireless communications

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- Number: US 12,184,306 B2
- Document ID: US12184306B2
- Status: Granted
- Kind: B2
- Application number: 18/353,538
- Filed: 2023-07-17
- Published: 2024-01-18
- Granted: 2024-12-31
- Earliest claimed: 2022-07-15
- Assignees: Analog Devices International Unlimited Company
- Applicants: Analog Devices International Unlimited Company
- Inventors: Shajeel Iqbal; Anders Lund
- Web page: https://patentgrep.com/patent/US12184306B2

## CPC

- H03M 13/13: Linear codes
- H03M 13/09: Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
- H03M 13/27: using interleaving techniques
- H03M 13/635: {Error control coding in combination with rate matching}
- H04L 1/0041: {Arrangements at the transmitter end}
- H04L 1/0057: {Block codes (H04L1/0061, H04L1/0064 take precedence)}
- H04L 1/0071: {Use of interleaving (interleaving per se H03M13/27)}
- H04W 28/04: Error control
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72)

## Abstract

Example implementations include a method, apparatus and computer-readable medium of wireless communications, comprising receiving an input data sequence of a set of bits, wherein the input data sequence includes at least a portion of a set of CRC interleaved information bits, and wherein a number of the set of bits is at least 32. The implementations further include encoding the input data sequence by a polar encoder to define an intermediate polar encoded data sequence, the polar encoder having a combinational circuit including a plurality of stages that operate in a same clock cycle. Additionally, the implementations further include encoding the intermediate polar encoded data sequence for each of the plurality of stages according to a polar encoder factor graph to obtain a final polar encoded data sequence. Additionally, the implementations further include transmitting a polar encoded codeword on a control channel based on the final polar encoded data sequence.

## Claims

### Claim 1

A method of wireless communications, comprising:
receiving an input data sequence of a set of bits, wherein the input data sequence includes at least a portion of a set of CRC interleaved information bits, and wherein a number of the set of bits is at least 32;
encoding the input data sequence by a polar encoder to define an intermediate polar encoded data sequence, the polar encoder having a combinational circuit including a plurality of stages that operate in a same clock cycle;
encoding the intermediate polar encoded data sequence for each of the plurality of stages according to a polar encoder factor graph to obtain a final polar encoded data sequence; and
transmitting a polar encoded codeword on a control channel based on the final polar encoded data sequence.

### Claim 2 (depends on 1)

The method of claim 1, wherein the polar encoder comprises a radix-k processing architecture, where k is the number of the set of bits of the input data sequence used in processing elements.

### Claim 3 (depends on 1)

The method of claim 1, wherein the polar encoder uses a polar transformation matrix of N, where N is a number of bits of the polar encoded codeword.

### Claim 4 (depends on 1)

The method of claim 1, wherein each of the plurality of stages includes one or more groups, wherein encoding the intermediate polar encoded data sequence for each of the plurality of stages further comprises:
writing a first set of input data based on the intermediate polar encoded data sequence to a first memory, wherein the first set of input data each have an odd index;
writing a second set of input data based on the intermediate polar encoded data sequence to a second memory, wherein the second set of input data each have an even index;
performing, for each of the plurality of stages and based on the first set of input data and the second set of input data and at least one counter value, stage-specific operations including:
reading, by each XOR-PASS module in an respective group in a respective stage, a respective stage-specific and group-specific set of input data from the first memory and second memory;
performing XOR-PASS operations on the respective stage-specific and group-specific set of input data; and
writing a respective stage-specific and group-specific set of output data to the first memory and second memory.

### Claim 5 (depends on 4)

The method of claim 4, wherein writing the respective stage-specific and group-specific set of output data to the first memory and second memory is based on where each of the respective stage-specific and group-specific set of output data is used as input data in a subsequent stage.

### Claim 6 (depends on 4)

The method of claim 4, further comprising tracking, by a control unit and for each of the plurality of stages, respective values of the at least one counter value to track a respective group number, a respective stage number, and a respective number of XOR-PASS modules per stage.

### Claim 7 (depends on 1)

The method of claim 1, wherein the set of CRC interleaved information bits are based on downlink control information.

### Claim 8 (depends on 1)

The method of claim 1, wherein the control channel further comprises a physical downlink control channel.

### Claim 9

An apparatus for wireless communications, comprising:
one or more memories; and
one or more processors coupled with the one or more memories and configured, individually or in combination, to:
receive an input data sequence of a set of bits, wherein the input data sequence includes at least a portion of a set of CRC interleaved information bits, and wherein a number of the set of bits is at least 32;
encode the input data sequence by a polar encoder to define an intermediate polar encoded data sequence, the polar encoder having a combinational circuit including a plurality of stages that operate in a same clock cycle;
encode the intermediate polar encoded data sequence for each of the plurality of stages according to a polar encoder factor graph to obtain a final polar encoded data sequence; and
transmit a polar encoded codeword on a control channel based on the final polar encoded data sequence.

### Claim 10 (depends on 9)

The apparatus of claim 9, wherein the polar encoder comprises a radix-k processing architecture, where k is the number of the set of bits of the input data sequence used in processing elements.

### Claim 11 (depends on 9)

The apparatus of claim 9, wherein the polar encoder uses a polar transformation matrix of N, where N is a number of bits of the polar encoded codeword.

### Claim 12 (depends on 9)

The apparatus of claim 9, wherein each of the plurality of stages includes one or more groups, wherein to encode the intermediate polar encoded data sequence for each of the plurality of stages the one or more processors are further configured to:
write a first set of input data based on the intermediate polar encoded data sequence to a first memory, wherein the first set of input data each have an odd index;
write a second set of input data based on the intermediate polar encoded data sequence to a second memory, wherein the second set of input data each have an even index;
perform, for each of the plurality of stages and based on the first set of input data and the second set of input data and at least one counter value, stage-specific operations including:
read, by each XOR-PASS module in an respective group in a respective stage, a respective stage-specific and group-specific set of input data from the first memory and second memory;
perform XOR-PASS operations on the respective stage-specific and group-specific set of input data; and
write a respective stage-specific and group-specific set of output data to the first memory and second memory.

### Claim 13 (depends on 12)

The apparatus of claim 12, wherein to write the respective stage-specific and group-specific set of output data to the first memory and second memory is based on where each of the respective stage-specific and group-specific set of output data is used as input data in a subsequent stage.

### Claim 14 (depends on 12)

The apparatus of claim 12, wherein the one or more processors are further configured to track, using a control unit and for each of the plurality of stages, respective values of the at least one counter value to track a respective group number, a respective stage number, and a respective number of XOR-PASS modules per stage.

### Claim 15 (depends on 9)

The apparatus of claim 9, wherein the set of CRC interleaved information bits are based on downlink control information.

### Claim 16 (depends on 9)

The apparatus of claim 9, wherein the control channel the processor is further configured to a physical downlink control channel.

### Claim 17

A computer-readable medium comprising stored instructions for wireless communications, wherein the instructions are executable by one or more processors to:
receive an input data sequence of a set of bits, wherein the input data sequence includes at least a portion of a set of CRC interleaved information bits, and wherein a number of the set of bits is at least 32;
encode the input data sequence by a polar encoder to define an intermediate polar encoded data sequence, the polar encoder having a combinational circuit including a plurality of stages that operate in a same clock cycle;
encode the intermediate polar encoded data sequence for each of the plurality of stages according to a polar encoder factor graph to obtain a final polar encoded data sequence; and
transmit a polar encoded codeword on a control channel based on the final polar encoded data sequence.