# US 12,184,244 B2 · Millimeter-wavelength power amplifiers having both high power gain and high output power > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,184,244 B2 - Document ID: US12184244B2 - Status: Granted - Kind: B2 - Application number: 17/369,879 - Filed: 2021-07-07 - Published: 2022-01-13 - Granted: 2024-12-31 - Earliest claimed: 2020-07-07 - Applicants: The Regents of the University of California - Inventors: Hadi Bameri; Omeed Momeni - Web page: https://patentgrep.com/patent/US12184244B2 ## CPC - H03F 1/223: {with MOSFET's} - H03F 3/211: {using a combination of several amplifiers (H03F3/60 takes precedence)} - H03F 1/565: {using inductive elements} - H03F 3/45183: {Long tailed pairs (H03F3/4521, H03F3/45237 take precedence)} - H03F 2200/451: the amplifier being a radio frequency amplifier - H03F: AMPLIFIERS ## Abstract A power amplifier (amp) is disclosed. This power amp can include a first transistor configured in the common source (CS) amplification mode, wherein the gate terminal of the first transistor is used as the input port of the power amp; and a second transistor configured in the common gate (CG) amplification mode, wherein the drain terminal of the second transistor is used as the output port of the power amp. The power amp also includes a first inductive component coupled between the drain terminal of the first transistor and the ground to increase the impedance between the drain terminal of the first transistor and the ground, thereby increasing an output power at the output port. The power amp additionally includes a second inductive component coupled between the drain terminal of the first transistor and the source terminal of the second transistor to increase the conductance in the output admittance at the output port, thereby further increasing the output power at the output port. ## Claims ### Claim 1 A cascode amplifier-cell (amp-cell), comprising: a first transistor configured in the common source (CS) amplification mode, wherein the gate terminal of the first transistor is used as the input port of the cascode amp-cell; a second transistor configured in the common gate (CG) amplification mode, wherein the drain terminal of the second transistor is used as the output port of the cascode amp-cell; a first inductive component coupled between the drain terminal of the first transistor and the ground to increase the impedance between the drain terminal of the first transistor and the ground, thereby increasing an output signal and a signal gain at the output port; and a second inductive component coupled between the drain terminal of the first transistor and the source terminal of the second transistor to increase the conductance in the output admittance at the output port, thereby further increasing an output signal at the output port, wherein the second inductive component includes a first transmission line. ### Claim 2 (depends on 1) The cascode amp-cell of claim 1, wherein the first inductive component includes a first inductor implemented as a second transmission line. ### Claim 3 (depends on 2) The cascode amp-cell of claim 2, wherein the first inductive component further includes a DC-blocking capacitor coupled in series with the second transmission line. ### Claim 4 (depends on 1) The cascode amp-cell of claim 1, wherein the first inductive component is configured to resonate with a parasitic capacitance between the drain terminal of the first transistor and the ground at a millimeter-wavelength (mm-wave) frequency. ### Claim 5 (depends on 1) The cascode amp-cell of claim 1, wherein the second inductive component is configured to maximize the conductance in the output admittance at the output port. ### Claim 6 (depends on 1) The cascode amp-cell of claim 1, wherein the second inductive component is configured to increase the ratio of the resistance to the reactance in the impedance seen from the drain of the second transistor. ### Claim 7 (depends on 1) The cascode amp-cell of claim 1, wherein the first transmission line is configured to have a length between 0 and λ/4, wherein λ is the electrical wavelength associated with an operating frequency of the cascode amp-cell. ### Claim 8 (depends on 1) The cascode amp-cell of claim 1, wherein the cascode amp-cell is configured as a power amplifier, and wherein the first inductive component and the second inductive component are configured to increase a power transfer from the first transistor to the second transistor. ### Claim 9 (depends on 1) The cascode amp-cell of claim 1, further comprising an impedance-matching circuitry coupled to the input port of the cascode amp-cell to conjugate-match a source impedance of the cascode amp-cell to a load impedance of the cascode amp-cell. ### Claim 10 A power amplifier (amp), comprising: a first transistor configured in the common source (CS) amplification mode, wherein the gate terminal of the first transistor is used as the input port of the power amp; a second transistor configured in the common gate (CG) amplification mode, wherein the drain terminal of the second transistor is used as the output port of the power amp; a first inductive component coupled between the drain terminal of the first transistor and the ground to increase the impedance between the drain terminal of the first transistor and the ground, thereby increasing an output power at the output port; and a second inductive component coupled between the drain terminal of the first transistor and the source terminal of the second transistor to increase the conductance in the output admittance at the output port, thereby further increasing the output power at the output port, wherein the second inductive component includes a first transmission line. ### Claim 11 (depends on 10) The power amp of claim 10, wherein the first inductive component includes a first inductor implemented as a second transmission line. ### Claim 12 (depends on 11) The power amp of claim 11, wherein the first inductive component further includes a DC-blocking capacitor coupled in series with the second transmission line. ### Claim 13 (depends on 10) The power amp of claim 10, wherein the first inductive component is configured to resonate with a parasitic capacitance between the drain terminal of the first transistor and the ground at a millimeter-wave (mm-wave) frequency. ### Claim 14 (depends on 10) The power amp of claim 10, wherein the second inductive component is configured to maximize the conductance in the output admittance at the output port. ### Claim 15 (depends on 10) The power amp of claim 10, wherein the second inductive component is configured to increase the ratio of the resistance to the reactance in the impedance seen from the drain of the second transistor. ### Claim 16 (depends on 10) The power amp of claim 10, wherein the first transmission line is configured to have a length between 0 and λ/4, wherein λ is the electrical wavelength associated with an operating frequency of the power amp. ### Claim 17 (depends on 10) The power amp of claim 10, wherein the first inductive component and the second inductive component are configured to increase a power transfer ratio from the first transistor to the second transistor. ### Claim 18 (depends on 10) The power amp of claim 10, further comprising an impedance-matching circuitry coupled to the input port of the power amp to conjugate-match a source impedance of the power amp to a load impedance of the power amp.