# US 12,184,198 B2 · Switching power supply current sensing, zero-crossing detection and overvoltage protection > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,184,198 B2 - Document ID: US12184198B2 - Status: Granted - Kind: B2 - Application number: 17/895,272 - Filed: 2022-08-25 - Published: 2023-03-02 - Granted: 2024-12-31 - Earliest claimed: 2021-08-26 - Assignees: Silergy Semiconductor Technology (Hangzhou) LTD - Applicants: Silergy Semiconductor Technology (Hangzhou) LTD - Inventors: Chaojun Chen - Web page: https://patentgrep.com/patent/US12184198B2 ## CPC - H02M 3/156: with automatic control of output voltage or current, e.g. switching regulators - H02M 7/217: using semiconductor devices only - H02M 1/0009: {Devices or circuits for detecting current in a converter} - H02M 1/0058: {by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero (using an auxiliary actively switched resonant commutation circuit connected to an intermediate DC voltage or between two push-pull branches of an inverter bridge H02M7/4811; in resonant inverters H02M7/4815; in inverters operating from a resonant DC source H02M7/4826)} - H02M 1/32: Means for protecting converters other than automatic disconnection - H02M 1/4225: {using a non-isolated boost converter} - H02M 3/33523: {with galvanic isolation between input and output of both the power stage and the feedback loop} - H02M 1/4258: {using a single converter stage both for correction of AC input power factor and generation of a regulated and galvanically isolated DC output voltage (H02M1/4241 takes precedence)} - H02M 3/33507: {with automatic control of the output voltage or current, e.g. flyback converters (H02M3/33561, H02M3/33569 take precedence)} - Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS ## Abstract A control circuit for a switching power supply, can include: a sampling circuit configured to obtain an inductor current and a drain-source voltage of a main power transistor in a power stage circuit, in order to generate a sampling signal; where the control circuit generates an inductor current sampling signal according to the sampling signal during an on-period of the main power transistor; and where during an off-period of the main power transistor, the control circuit generates a zero-crossing signal of the inductor current and an overvoltage signal of an output voltage of the switching power supply according to the sampling signal. ## Claims ### Claim 1 A control circuit for a switching power supply, the control circuit comprising: a) a sampling circuit configured to obtain an inductor current and a drain-source voltage of a main power transistor in a power stage circuit, in order to generate a sampling signal; b) wherein the control circuit generates an inductor current sampling signal according to the sampling signal during an on-period of the main power transistor, c) wherein during an off-period of the main power transistor, the control circuit generates a zero-crossing signal of the inductor current and an overvoltage signal of an output voltage of the switching power supply according to the sampling signal; and d) wherein the sampling circuit comprises a current sampling circuit configured to obtain the inductor current and generate the inductor current sampling signal, a differential circuit comprising a first capacitor and a third resistor, and being configured to generate a differential signal by differentiating the drain-source voltage when the main power transistor is turned off, and a voltage divider circuit configured to divide the drain-source voltage to obtain a voltage divider signal when the main power transistor is turned off. ### Claim 2 (depends on 1) The control circuit of claim 1, wherein the control circuit comprises a control chip, the sampling signal is transmitted to a detection circuit inside the control chip through a multiplexer detection pin, and the detection circuit receives the sampling signal and generates the inductor current sampling signal, the zero-crossing signal, and the overvoltage signal. ### Claim 3 (depends on 2) The control circuit of claim 2, wherein a first terminal of the differential circuit is connected to a drain of the main power transistor, a second terminal of the differential circuit is connected to a source of the main power transistor, a third terminal of the differential circuit is coupled to the multiplexer detection pin. ### Claim 4 (depends on 3) The control circuit of claim 3, wherein a first terminal of the voltage divider circuit is connected to the drain of the main power transistor, a second terminal of the voltage divider circuit is connected to the source of the main power transistor through the differential circuit, and a third terminal of the voltage divider circuit is connected to the multiplexer detection pin, and the voltage divider signal is generated at the third terminal of the voltage divider circuit. ### Claim 5 (depends on 3) The control circuit of claim 3, wherein a first terminal of the voltage divider circuit is connected to the drain of the main power transistor, a second terminal of the voltage divider circuit is connected to the source of the main power transistor, and a third terminal of the voltage divider circuit is connected to the multiplexer detection pin through the differential circuit, and the voltage divider signal is generated at the third terminal of the voltage divider circuit. ### Claim 6 (depends on 5) The control circuit of claim 5, wherein the sampling circuit comprises a current limiting resistor, and the differential circuit is connected to the multiplexer detection pin through the current limiting resistor. ### Claim 7 (depends on 3) The control circuit of claim 3, wherein a first terminal of the first capacitor is connected to the drain of the main power transistor, and a second terminal of the first capacitor is connected to one terminal of the third resistor, the other terminal of the third resistor is connected to the source of the main power transistor, the second terminal of the first capacitor is also coupled to the multiplexer detection pin. ### Claim 8 (depends on 2) The control circuit of claim 2, wherein the detection circuit comprises a first detection circuit for receiving the sampling signal at the multiplexer detection pin, and during the on-period of the main power transistor, when the sampling signal reaches an overcurrent threshold representing inductor current overcurrent information, an overcurrent signal is activated. ### Claim 9 (depends on 2) The control circuit of claim 2, wherein the detection circuit is configured to receive the sampling signal at the multiplexer detection pin, and the sampling signal is configured as the inductor current sampling signal during the on-period of the main power transistor. ### Claim 10 (depends on 2) The control circuit of claim 2, wherein the detection circuit comprises a second detection circuit for receiving the sampling signal at the multiplexer detection pin, and during the off-period of the main power transistor, when the sampling signal reaches an overvoltage threshold representing output voltage overvoltage information, the overvoltage signal is activated. ### Claim 11 (depends on 2) The control circuit of claim 2, wherein the detection circuit comprises a third detection circuit for receiving the sampling signal at the multiplexer detection pin, and during the off-period of the main power transistor, when the sampling signal reaches a zero-crossing threshold representing a zero-crossing information of the inductor current, the zero-crossing signal is activated. ### Claim 12 (depends on 1) The control circuit of claim 1, wherein in one switching cycle, a first interval of the sampling signal is configured as the inductor current sampling signal representing the inductor current during the on-period of the main power transistor. ### Claim 13 (depends on 1) The control circuit of claim 1, wherein in one switching cycle, a second interval of the sampling signal is configured as a voltage divided signal representing the drain-source voltage of the main power transistor. ### Claim 14 (depends on 1) The control circuit of claim 1, wherein in one switching cycle, a third interval of the sampling signal is configured as a differential signal representing a change rate of the drain-source voltage of the main power transistor. ### Claim 15 (depends on 1) The control circuit of claim 1, wherein the control circuit is configured to obtain an overcurrent signal of the inductor current according to the sampling signal during the on-period of the main power transistor.