# US 12,184,178 B2 · 4-phase buck-boost converter

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- Number: US 12,184,178 B2
- Document ID: US12184178B2
- Status: Granted
- Kind: B2
- Application number: 18/311,602
- Filed: 2023-05-03
- Published: 2023-08-31
- Granted: 2024-12-31
- Earliest claimed: 2019-09-20
- Assignees: Texas Instruments Incorporated
- Applicants: Texas Instruments Incorporated
- Inventors: Johann Erich Bayer; Rüdiger Ganz; Ivan Shumkov
- Web page: https://patentgrep.com/patent/US12184178B2

## CPC

- H02M 3/1582: {Buck-boost converters (H02M3/1584 takes precedence)}
- H03K 5/24: the characteristic being amplitude
- H02M 1/0032: {Control circuits allowing low power mode operation, e.g. in standby mode}
- H02M 1/0003: {Details of control, feedback or regulation circuits}
- H02M 1/0009: {Devices or circuits for detecting current in a converter}
- H02M 1/0012: {Control circuits using digital or numerical techniques (in DC/DC converters H02M3/157, H02M3/33515; in DC-AC converters H02M7/53873)}
- H02M 3/157: with digital control
- Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS

## Abstract

A system has an input and an output. The system includes a voltage converter, including first transistor coupled to the input and to a first switching node, second transistor coupled to the first switching node and to ground, third transistor coupled to a second switching node and to the output, fourth transistor coupled to the second switching node and to ground, and an inductor having a first terminal coupled to the first switching node and a second terminal coupled to the second switching node. The system also includes a controller coupled to the voltage converter, the controller including a state machine and a plurality of drivers to control the transistors of the voltage converter. The state machine is adaptable to cause the second and fourth transistors to conduct and the first and third transistors not to conduct, in response to current through the inductor being less than a current threshold.

## Claims

### Claim 1

A controller comprising:
a timer having first, second and third timer inputs and a timer output, wherein the first timer input is coupled to an input terminal, the second timer input is coupled to an output terminal;
a first comparator having a first comparator output and first and second comparator inputs, wherein the first comparator input is coupled to the output terminal, and the second comparator input is coupled to a reference voltage terminal;
a logic circuit having first and second logic inputs and first, second, and third logic outputs, wherein the first logic input is coupled to the timer output, the second logic input is coupled to the first comparator output, and the third logic output is coupled to the third timer input, wherein the logic circuit is configurable to provide a signal at the third logic output to trigger the timer to begin timing;
a first driver having a first driver input and first and second driver outputs, wherein the first driver input is coupled to the first logic output; and
a second driver having a second driver input and third and fourth driver outputs, wherein the second driver input is coupled to the second logic output;
an inductor having first and second inductor terminals;
a first transistor coupled between the input terminal and the first inductor terminal, and having a first control terminal coupled to the first driver output;
a second transistor coupled between the first inductor terminal and a ground terminal, and having a second control terminal coupled to the second driver output;
a third transistor coupled between the second inductor terminal and the output terminal, and having a third control terminal coupled to the third driver output; and
a fourth transistor coupled between the second inductor terminal and the ground terminal, and having a fourth control terminal coupled to the fourth driver output;
a second comparator having a second comparator output and third and fourth comparator inputs, wherein the third comparator input is coupled to the first inductor terminal, the fourth comparator input is coupled to a second reference voltage terminal, and a voltage at the first inductor terminal is proportional to a current through the inductor;
wherein the controller is configured to cause a system to operate in a first state, a second state, a third state, and a fourth state, in which:
the first and fourth transistors are turned on during the first state, and the second and third transistors are turned off during the first state;
the first and third transistors are turned on during the second state, and the second and fourth transistors are turned off during the second state;
the logic circuit transitions to the second state responsive to the current through the inductor being greater than a first current threshold;
the logic circuit transitions to the third state responsive to the current through the inductor being less than a second current threshold, in which the second current threshold is lower than the first current threshold; and
the second and fourth transistors are turned on during the third state, the first and third transistors are turned off during the third state, and the system remains in the third state until a voltage at the output terminal falls below a first threshold voltage; and
the second and third transistors are turned on during the fourth state, and the first and fourth transistors are turned off during the fourth state.

### Claim 2 (depends on 1)

The controller of claim 1, wherein the controller is configured to operate the system in the fourth state directly after the second state and directly before the third state.

### Claim 3 (depends on 1)

The controller of claim 1, wherein the logic circuit transitions from the second state to the fourth state after a certain duration operating in the second state.

### Claim 4 (depends on 3)

The system of claim 3, wherein the certain duration is a constant time value.

### Claim 5 (depends on 1)

The system of claim 1, wherein the controller controls a voltage converter in a buck mode.

### Claim 6 (depends on 1)

The system of claim 1, wherein the controller controls a voltage converter in a boost mode or a buck-boost mode.

### Claim 7 (depends on 3)

The system of claim 3, wherein the certain duration is set responsive to a voltage at the input terminal and the voltage at the output terminal.