# US 12,183,852 B2 · Growth of cubic crystalline phase structure on silicon substrates and devices comprising the cubic crystalline phase structure

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- Number: US 12,183,852 B2
- Document ID: US12183852B2
- Status: Granted
- Kind: B2
- Application number: 17/208,905
- Filed: 2021-03-22
- Published: 2021-07-29
- Granted: 2024-12-31
- Earliest claimed: 2012-05-04
- Applicants: Unm Rainforest Innovations
- Inventors: Steven R. J. Brueck; Seung-Chang Lee; Christian Wetzel; Mark Durniak
- Web page: https://patentgrep.com/patent/US12183852B2

## CPC

- H10H 20/825: containing nitrogen, e.g. GaN
- H10D 62/40: Crystalline structures
- H10H 20/01335: {the light-emitting regions comprising nitride materials}
- H10H 20/0137: {the light-emitting regions comprising nitride materials}
- H10H 20/018: {Bonding of wafers}
- H10H 20/811: having quantum effect structures or superlattices, e.g. tunnel junctions
- H10H 20/818: within the light-emitting regions
- H10P 14/2905: {Silicon, silicon germanium or germanium}
- H10P 14/2911: {Arsenides}
- H10P 14/2925: {Surface structures}
- H10P 14/2926: {Crystal orientations}
- H10P 14/3216: {Nitrides}
- H10P 14/3242: {Structure}
- H10P 14/3248: {consisting of two layers}
- H10P 14/3254: {Graded layers}
- H10P 14/3416: {Nitrides}
- H10P 14/3451: {Structure}
- H10P 14/3466: {Crystal orientation}
- H10P 95/11: {Separation of active layers from substrates}
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method of forming a semiconductor structure includes providing a substrate comprising a first material portion and a single crystal silicon layer on the first material portion. The substrate further comprises a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface. A buffer layer is deposited in one or more of the plurality of grooves. A semiconductor material is epitaxially grown over the buffer layer and in the one or more plurality of grooves, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase.

## Claims

### Claim 1

A light emitting diode comprising:
a silicon substrate comprising an (001) surface;
a V-groove in the silicon substrate exposing two opposing {111} surfaces,
a Group III-nitride compound semiconductor material supported by the (001) surface of the substrate, the Group III-nitride compound semiconductor material having a cubic crystalline phase, an active region being positioned in the cubic crystalline phase, the cubic crystalline phase comprising a length dimension, a width dimension and a height dimension, the width dimension decreasing along at least a portion of the height dimension to form a tapered cubic crystalline-phase light-emitter structure, wherein the tapered cubic crystalline phase light emitter structure has two sides that interface with the two opposing {111} surfaces through a first hexagonal crystalline phase structure and a second hexagonal crystalline phase structure, wherein the cubic crystalline phase structure is a different material composition than the silicon substrate;
a first contact and a second contact, the first contact and second contact being positioned to provide electrical connectivity to the tapered cubic crystalline-phase light-emitter structure;
wherein at least one contact chosen from the first contact and the second contact is transparent to the light emitted from the light-emitter structure.

### Claim 2 (depends on 1)

The light emitting diode of claim 1, wherein the tapered cubic crystalline-phase light-emitter structure comprises a base that is a (001) plane of the cubic crystalline phase, the active region comprising one or more quantum wells oriented parallel to the base.

### Claim 3 (depends on 1)

The light emitting diode of claim 1, wherein the Group III-nitride materials comprise a first layer comprising n-doped or p-doped GaN and a second layer comprising p-doped or n-doped GaN, the active region being disposed between the first layer and the second layer, wherein if the first layer is p-doped then the second layer is n-doped and if the first layer is n-doped then the second layer is p-doped.

### Claim 4 (depends on 3)

The light emitting diode of claim 3, wherein the Group III-nitride materials further comprise a blocking layer comprising AlGaN on the active region.

### Claim 5 (depends on 3)

The light emitting diode of claim 3, wherein the cubic crystalline phase of the Group III-nitride is positioned between and adjacent to the first hexagonal crystalline phase structure of the group III-nitride and the second hexagonal crystalline phase structure of the Group III-nitride.

### Claim 6 (depends on 5)

The light emitting diode of claim 5, wherein the first hexagonal crystalline phase structure and the second hexagonal crystalline phase structure border the cubic crystal of the Group III-nitride compound semiconductor material in two border planes that intersect at an angle of about 105° to about 115°.

### Claim 7 (depends on 2)

The light emitting diode of claim 2 wherein the substrate is transparent to the light emitted from the light emitter structure.

### Claim 8 (depends on 2)

The light emitting diode of claim 2 wherein the substrate is reflective to the light emitted from the light emitting diode.

### Claim 9 (depends on 1)

The light emitting diode of claim 1, wherein the active region comprises one or more quantum wells that are parallel with a (001) crystal plane of the cubic crystalline phase.

### Claim 10

A light emitting diode device comprising:
a silicon substrate comprising an (001) surface;
a V-groove in the silicon substrate exposing two opposing {111} surfaces,
a plurality of light emitter structures supported by the (001) surface of the silicon substrate, the plurality of light emitter structures comprising Group III-nitride compound semiconductor materials having a cubic crystalline phase and an active region in the cubic crystalline phase, the cubic crystalline phase comprising a length dimension, a width dimension and a height dimension, the width dimension decreasing along at least a portion of the height dimension so that the plurality of light emitter structures are tapered, wherein the tapered cubic crystalline phase light emitter structure has two sides that interface with the two opposing {111} surfaces through a first hexagonal crystalline phase structure and a second hexagonal crystalline phase structure, wherein the cubic crystalline phase structure is a different material composition than the silicon substrate; and
a first contact and a second contact, the first contact and second contact being positioned to provide electrical connectivity to the light emitting diode device;
wherein at least one contact chosen from the first contact and the second contact is transparent to the light emitted from the light-emitting diodes.

### Claim 11 (depends on 10)

The light emitting diode device of claim 10, wherein the substrate is transparent to the light emitted from the light emitting diode device.

### Claim 12 (depends on 10)

The light emitting diode device of claim 10, wherein the substrate is reflective to the light emitted from the light emitting diode device.

### Claim 13 (depends on 10)

The light emitting diode of claim 10, wherein the active region positioned in the cubic crystalline phase comprises one or more quantum wells parallel to a (001) plane of the cubic crystalline phase.

### Claim 14 (depends on 10)

The light emitting diode of claim 10, wherein the Group III-nitride compound semiconductor materials comprise a first layer comprising n-doped or p-doped GaN, a second layer comprising p-doped or n-doped GaN, the active region disposed between the first layer and the second layer, and wherein if the first layer is p-doped then the second layer is n-doped and if the first layer is n-doped then the second layer is p-doped.

### Claim 15

An intermediate semiconductor structure comprising:
a substrate comprising a first material portion and a single crystal silicon layer positioned on the first material portion, a major front surface of the crystal silicon layer comprising a (001) crystal plane, a major backside surface opposing the major front surface, and a groove positioned in the major front surface, the groove comprising {111} crystal faces;
a buffer layer disposed in the groove;
an epitaxially grown semiconductor material disposed over the buffer layer and in the groove, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase layer, the cubic crystalline phase structure having an upper face that is parallel with the (001) crystal face of the major front surface while being disposed over the {111} crystal faces of the groove.

### Claim 16 (depends on 15)

The intermediate semiconductor structure of claim 15, wherein the groove is a V-groove.

### Claim 17 (depends on 15)

The intermediate semiconductor structure of claim 15, wherein the groove is a truncated V-groove comprising a first diagonal sidewall, a second diagonal sidewall opposing the first diagonal sidewall, and a bottom portion that is parallel with the major front surface of the substrate surface.

### Claim 18 (depends on 17)

The intermediate semiconductor structure of claim 17, further comprising a gap between the hexagonal crystalline phase layers and the bottom portion of the truncated v-groove.

### Claim 19

A light emitting diode comprising:
a cubic crystal substrate comprising a V-groove with exposed (111) surfaces;
a first Group III/V compound semiconductor material deposited on the (111) surfaces having hexagonal crystalline phases supported by the substrate;
a second Group III/V compound semiconductor material deposited on the first Group III-V semiconductor material having a cubic crystalline phase, an active region being positioned within the cubic crystalline phase, the cubic crystalline phase comprising a length dimension, a width dimension and a height dimension, the width dimension decreasing along at least a portion of the height dimension to form a tapered cubic crystalline-phase light-emitter structure; and
a first contact and a second contact, the first contact and second contact being positioned to provide electrical connectivity to the tapered cubic crystalline-phase light-emitter structure;
wherein at least one contact chosen from the first contact and the second contact is transparent to the light emitted from the light-emitter structure.