# US 12,183,794 B2 · MOSFET gate shielding using an angled implant

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- Number: US 12,183,794 B2
- Document ID: US12183794B2
- Status: Granted
- Kind: B2
- Application number: 17/395,854
- Filed: 2021-08-06
- Published: 2023-02-09
- Granted: 2024-12-31
- Earliest claimed: 2021-08-06
- Assignees: Applied Materials, Inc.
- Applicants: Applied Materials, Inc.
- Inventors: Qintao Zhang; Samphy Hong
- Web page: https://patentgrep.com/patent/US12183794B2

## CPC

- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10D 30/0295: {using recessing of the source electrodes}
- H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes}
- H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)}
- H10D 62/8325: {Silicon carbide}
- H10D 64/01: Manufacture or treatment
- H10P 30/2042: {into crystalline silicon carbide}
- H10P 30/21: {of electrically active species}
- H10P 30/221: {characterised by the angle between the ion beam and the mask}
- H10P 30/222: {characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221)}
- H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs}
- H10D 62/157: {Impurity concentrations or distributions}
- H10D 64/01366: {the semiconductor being silicon carbide}
- H10D 64/2527: {for vertical devices wherein the source or drain electrodes are recessed in semiconductor bodies}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Methods may include providing a device structure having a shielding layer formed beneath each trench in a MOSFET to protect trench corner breakdown. The method may include providing a device structure comprising an epitaxial layer, a well over the epitaxial layer, and a source layer over the well, and providing a plurality of trenches through the device structure. The method may further include forming a shielding layer in the device structure by directing ions into the plurality of trenches.

## Claims

### Claim 1

A method, comprising:
providing a device structure comprising an epitaxial layer, a well over the epitaxial layer, and a source layer over the well;
providing a plurality of trenches through the device structure;
forming a shielding layer in the device structure by directing ions into the plurality of trenches;
forming a plurality of contact trenches through a blocking layer and the source layer; and
forming a contact within one or more of the plurality of contact trenches.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
forming an oxide layer within each of the plurality of trenches after the blocking layer is removed;
forming a gate material atop the oxide layer within each of the plurality of trenches;
forming an interlayer dielectric over the device structure;
forming a second plurality of contact trenches through the interlayer dielectric; and
depositing a metal material over the interlayer dielectric and within the second plurality of contact trenches.

### Claim 3 (depends on 1)

The method of claim 1, further comprising:
providing a current spreading layer atop the epitaxial layer; and
providing a hardmask atop the source layer, wherein the plurality of trenches are formed through the hardmask, the source layer, the well, the current spreading layer, and the epitaxial layer.

### Claim 4 (depends on 1)

The method of claim 1, wherein directing ions into the plurality of trenches comprises:
directing first ions into a first sidewall of each of the plurality of trenches; and
directing second ions into a second sidewall of each of the plurality of trenches, wherein the first ions and the second ions are directed at a non-zero angle of inclination relative to a perpendicular extending from a top surface of the source layer.

### Claim 5 (depends on 4)

The method of claim 4, further comprising directing third ions into a bottom of the plurality of trenches.

### Claim 6 (depends on 4)

The method of claim 4, wherein the first and second ions are directed into the first and second sidewalls of each of the plurality of trenches without directing the first and second ions into a third sidewall or a fourth sidewall of each of the plurality of trenches, wherein the first and second sidewalls extend parallel to one another, wherein the third and fourth sidewalls extend parallel to one another, and wherein the first sidewall extends perpendicular to the third sidewall.

### Claim 7 (depends on 1)

The method of claim 1, wherein the epitaxial layer is a silicon carbide (SiC) layer, the well is a p-type well, and the source layer is an N+ source layer.

### Claim 8

A method of forming trenches in a metal-oxide-semiconductor field-effect transistor (MOSFET), the method comprising:
providing a device structure comprising an epitaxial layer atop a base, a well over the epitaxial layer, and a source layer over the well;
providing a plurality of trenches through the device structure;
forming a shielding layer in the device structure by directing ions into the plurality of trenches, wherein the ions are directed into a lower surface and first and second sidewalls of each of the plurality of trenches;
forming a blocking layer over the device structure including within each of the plurality of trenches following formation of the shielding layer;
forming a plurality of contact trenches through the blocking layer and the source layer; and
forming a contact within one or more of the plurality of contact trenches.

### Claim 9 (depends on 8)

The method of claim 8, further comprising:
forming an oxide layer within each of the plurality of trenches after the blocking layer is removed;
forming a gate material atop the oxide layer within each of the plurality of trenches;
forming an interlayer dielectric over the device structure;
forming a second plurality of contact trenches through the interlayer dielectric; and
depositing a metal material over the interlayer dielectric and within the second plurality of contact trenches.

### Claim 10 (depends on 8)

The method of claim 8, further comprising:
providing a current spreading layer atop the epitaxial layer; and
providing a hardmask atop the source layer, wherein the plurality of trenches are formed through the hardmask, the source layer, the well, the current spreading layer, and the epitaxial layer.

### Claim 11 (depends on 8)

The method of claim 8, wherein directing ions into the plurality of trenches comprises:
directing first ions into a first sidewall of each of the plurality of trenches; and
directing second ions into a second sidewall of each of the plurality of trenches, wherein the first ions and the second ions are directed at a non-zero angle of inclination relative to a perpendicular extending from a top surface of the source layer.

### Claim 12 (depends on 11)

The method of claim 11, further comprising directing third ions into a bottom of the plurality of trenches.

### Claim 13 (depends on 11)

The method of claim 11, wherein the first and second ions are directed into the first and second sidewalls of each of the plurality of trenches without directing the first and second ions into a third sidewall or a fourth sidewall of each of the plurality of trenches, wherein the first and second sidewalls extend parallel to one another, wherein the third and fourth sidewalls extend parallel to one another, and wherein the first sidewall extends perpendicular to the third sidewall.

### Claim 14 (depends on 8)

The method of claim 8, further comprising;
forming the shielding layer to a first thickness along the lower surface of each of the plurality of trenches; and
forming the shielding layer to a second thickness along the first and second sidewalls of each of the plurality of trenches, wherein the first thickness is greater than the second thickness.