# US 12,183,774 B2 · Power converter

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- Number: US 12,183,774 B2
- Document ID: US12183774B2
- Status: Granted
- Kind: B2
- Application number: 17/417,769
- Filed: 2019-02-22
- Published: 2022-01-13
- Granted: 2024-12-31
- Earliest claimed: 2019-02-22
- Assignees: Mitsubishi Electric Corporation
- Applicants: Mitsubishi Electric Corporation
- Inventors: Shiro Hino; Junichi Nakashima; Takaaki Tominaga
- Web page: https://patentgrep.com/patent/US12183774B2

## CPC

- H10D 64/519: {characterised by their top-view geometrical layouts}
- H02M 7/003: {Constructional details, e.g. physical layout, assembly, wiring or busbar connections}
- H10D 1/20: Inductors
- H10D 12/031: {of IGBTs}
- H10D 30/0291: {of vertical DMOS [VDMOS] FETs}
- H10D 30/665: {having edge termination structures}
- H10D 62/107: {Buried supplementary regions, e.g. buried guard rings (multi-RESURF H10D62/111)}
- H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)}
- H10D 62/8325: {Silicon carbide}
- H10D 64/66: Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D 84/141: {VDMOS having built-in components}
- H10D 84/40: characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
- H10P 30/22: using masks
- H10W 10/00: Isolation regions in semiconductor bodies between components of integrated devices
- H10W 10/01: {Manufacture or treatment}
- H10W 10/031: {of isolation regions comprising PN junctions}
- H10W 10/30: Isolation regions comprising PN junctions
- H10W 20/484: {Interconnections having extended contours, e.g. pads having mesh shape or interconnections comprising connected parallel stripes}
- H10D 62/106: {having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions}
- H10D 84/401: {Combinations of FETs or IGBTs with BJTs}
- H10D 84/811: {Combinations of field-effect devices and one or more diodes, capacitors or resistors}
- H10W 72/926: {Multiple bond pads having different sizes}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

To provide a technique of reducing gate oscillation while suppressing reduction in switching speed. A semiconductor device according to the technique disclosed in the present description includes: a first gate electrode in an active region; a gate pad in a first region different from the active region in a plan view; and a first gate line electrically connecting the first gate electrode and the gate pad to each other. The first gate line is formed into a spiral shape. The first gate line is made of a different type of material from the first gate electrode.

## Claims

### Claim 1

A power converter comprising:
a plurality of semiconductor devices,
each of the semiconductor devices includes
a first gate electrode in an active region;
a gate pad in a first region different from the active region in a plan view; and
a first gate line electrically connecting the first gate electrode and the gate pad to each other, wherein
the first gate line is formed into a spiral shape,
an entirety of the first gate line is made of a different type of material than the first gate electrode, and the different type of material has a lower resistance than a material of the first gate electrode, and
the plurality of semiconductor devices are connected in parallel to each other.

### Claim 2 (depends on 1)

The power converter according to claim 1, wherein the first gate line surrounds the gate pad in a plan view.

### Claim 3 (depends on 1)

The power converter according to claim 1, wherein the first gate line is made of metal.

### Claim 4 (depends on 1)

The power converter according to claim 1, further comprising:
a second gate electrode in the first region connected to the first gate electrode; and
a second gate line in the first region connected to the second gate electrode.

### Claim 5 (depends on 4)

The power converter according to claim 4, wherein the first gate line is directly connected to the gate pad and the second gate line.

### Claim 6 (depends on 4)

The power converter according to claim 4, further comprising:
a second insulating film in the first region, the second insulating film covering the second gate electrode and having a plurality of contact holes.

### Claim 7 (depends on 6)

The power converter according to claim 6, wherein each of the first gate line and the second gate line is connected to the second gate electrode through any of the contact holes.

### Claim 8

A power converter comprising:
a plurality of semiconductor devices,
each of the semiconductor devices includes
a first gate electrode in an active region;
a gate pad in a first region different from the active region in a plan view; and
a first gate line electrically connecting the first gate electrode and the gate pad to each other, wherein
the first gate line is formed into a spiral shape,
the first gate line is arranged in the first region,
an entirety of the first gate line is made of a different type of material than the first gate electrode, and the different type of material has a lower resistance than a material of the first gate electrode, and
the plurality of semiconductor devices are connected in parallel to each other.

### Claim 9 (depends on 8)

The power converter according to claim 8, wherein the first gate line surrounds the gate pad in a plan view.

### Claim 10 (depends on 8)

The power converter according to claim 8, wherein the first gate line is made of metal.

### Claim 11 (depends on 8)

The power converter according to claim 8, further comprising:
a second gate electrode in the first region connected to the first gate electrode; and
a second gate line in the first region connected to the second gate electrode.

### Claim 12

A power converter comprising:
a plurality of semiconductor devices,
each of the semiconductor devices includes
a first gate electrode in an active region;
a gate pad in a first region different from the active region in a plan view; and
a first gate line electrically connecting the first gate electrode and the gate pad to each other, wherein
the first gate line surrounds the active region in a plan view and is not closed,
an entirety of the first gate line is made of a different type of material than the first gate electrode, and the different type of material has a lower resistance than a material of the first gate electrode, and
the plurality of semiconductor devices are connected in parallel to each other.

### Claim 13 (depends on 12)

The power converter according to claim 12, wherein the first gate line is arranged in the first region.

### Claim 14 (depends on 12)

The power converter according to claim 12, further comprising:
a source electrode covering the first gate electrode across a first insulating film in the active region, wherein
the first gate line surrounds the source electrode in a plan view.

### Claim 15 (depends on 12)

The power converter according to claim 12, wherein the first gate line is made of metal.

### Claim 16 (depends on 12)

The power converter according to claim 12, further comprising:
a second gate electrode in the first region connected to the first gate electrode; and
a second gate line in the first region connected to the second gate electrode.