# US 12,183,757 B2 · Solid-state imaging device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,183,757 B2 - Document ID: US12183757B2 - Status: Granted - Kind: B2 - Application number: 17/619,337 - Filed: 2020-06-25 - Published: 2022-11-17 - Granted: 2024-12-31 - Earliest claimed: 2019-06-26 - Assignees: Sony Semiconductor Solutions Corporation - Applicants: Sony Semiconductor Solutions Corporation - Inventors: Yoshiaki Kitano - Web page: https://patentgrep.com/patent/US12183757B2 ## CPC - H10F 39/8023: {Disposition of the elements in pixels, e.g. smaller elements in the centre of the imager compared to larger elements at the periphery} - H10F 39/809: {of hybrid image sensors} - H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components - H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters - H04N 25/79: Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors - H10D 30/62: Fin field-effect transistors [FinFET] - H10F 39/8037: {the integrated elements comprising a transistor} - H10F 39/811: {Interconnections} - H10F 39/813: {Electronic components shared by multiple pixels, e.g. one amplifier shared by two pixels} - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/60: wherein the TFTs are in active matrices - H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors - H10F 39/199: {Back-illuminated image sensors} - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract There is provided a solid-state imaging device including: a first substrate including a photoelectric converter and an electric charge accumulation section for each pixel, the electric charge accumulation section in which a signal electric charge generated in the photoelectric converter is accumulated; a second substrate including a semiconductor layer and a pixel transistor, the semiconductor layer being stacked on the first substrate, and the pixel transistor that includes a gate electrode opposed to the semiconductor layer, and reads the signal electric charge of the electric charge accumulation section; and a through electrode that is provided in the first substrate and the second substrate, and electrically couples the first substrate and the second substrate to each other and is partially in contact with the gate electrode. ## Claims ### Claim 1 A solid-state imaging device, comprising: a first substrate including a photoelectric converter and an electric charge accumulation section for each pixel, wherein a signal electric charge generated in the photoelectric converter is accumulated in the electric charge accumulation section; a second substrate including a semiconductor layer and a pixel transistor, wherein the semiconductor layer is stacked on the first substrate, and wherein the pixel transistor includes a gate electrode opposed to the semiconductor layer, and reads the signal electric charge of the electric charge accumulation section; and a through electrode that is provided in the first substrate and the second substrate, wherein the through electrode electrically couples the first substrate and the second substrate to each other, and wherein the through electrode is partially in contact with the gate electrode, wherein the semiconductor layer includes at least one fin, and wherein the gate electrode is opposed to a plurality of surfaces of the fin. ### Claim 2 (depends on 1) The solid-state imaging device according to claim 1, wherein the gate electrode is opposed to the semiconductor layer in a plurality of directions. ### Claim 3 (depends on 1) The solid-state imaging device according to claim 1, wherein the semiconductor layer includes a plurality of the fins, and wherein the semiconductor layer further includes an insulating film provided between adjacent ones of the fins. ### Claim 4 (depends on 1) The solid-state imaging device according to claim 1, wherein the semiconductor layer includes a plurality of the fins, and wherein the semiconductor layer further includes a connecting section that connects adjacent ones of the fins. ### Claim 5 (depends on 1) The solid-state imaging device according to claim 1, wherein the second substrate further includes an insulating region that divides the semiconductor layer, and wherein the through electrode penetrates through the insulating region. ### Claim 6 (depends on 1) The solid-state imaging device according to claim 1, wherein the pixel transistor comprises an amplification transistor. ### Claim 7 (depends on 1) The solid-state imaging device according to claim 1, wherein the through electrode electrically couples the electric charge accumulation section and the gate electrode of the pixel transistor to each other. ### Claim 8 A solid-state imaging device, comprising: a first substrate including a photoelectric converter and an electric charge accumulation section for each pixel, wherein a signal electric charge generated in the photoelectric converter is accumulated in the electric charge accumulation section; a second substrate including a semiconductor layer and a pixel transistor, wherein the semiconductor layer is stacked on the first substrate, and wherein the pixel transistor includes a gate electrode opposed to the semiconductor layer, and reads the signal electric charge of the electric charge accumulation section; and a through electrode that is provided in the first substrate and the second substrate, wherein the through electrode electrically couples the first substrate and the second substrate to each other, wherein the through electrode is partially in contact with the gate electrode, and wherein the gate electrode has a front surface opposed to the first substrate, and a side surface that is provided in a direction intersecting with the front surface and is in contact with the through electrode. ### Claim 9 (depends on 8) The solid-state imaging device according to claim 8, wherein the gate electrode includes a horizontal section and a sidewall section, wherein the horizontal section includes the front surface, wherein the sidewall section includes the side surface and is between the semiconductor layer and the through electrode, and wherein the sidewall section is provided in a thickness direction of the semiconductor layer. ### Claim 10 (depends on 9) The solid-state imaging device according to claim 9, wherein the gate electrode further includes a vertical section that is coupled to the horizontal section and is embedded in a portion in the thickness direction of the semiconductor layer. ### Claim 11 (depends on 8) The solid-state imaging device according to claim 8, wherein a portion of the front surface of the gate electrode is also in contact with the through electrode. ### Claim 12 (depends on 8) The solid-state imaging device according to claim 8, wherein the gate electrode is opposed to the semiconductor layer in a plurality of directions. ### Claim 13 (depends on 8) The solid-state imaging device according to claim 8, wherein the semiconductor layer includes at least one fin, and wherein the gate electrode is opposed to a plurality of surfaces of the fin. ### Claim 14 (depends on 13) The solid-state imaging device according to claim 13, wherein the semiconductor layer includes a plurality of the fins, and wherein the semiconductor layer further includes an insulating film provided between adjacent ones of the fins. ### Claim 15 (depends on 13) The solid-state imaging device according to claim 13, wherein the semiconductor layer includes a plurality of the fins, and wherein the semiconductor layer further includes a connecting section that connects adjacent ones of the fins. ### Claim 16 A solid-state imaging device, comprising: a first substrate including a photoelectric converter and an electric charge accumulation section for each pixel, wherein a signal electric charge generated in the photoelectric converter is accumulated in the electric charge accumulation section; a second substrate including a semiconductor layer and a pixel transistor, wherein the semiconductor layer is stacked on the first substrate, and wherein the pixel transistor includes a gate electrode opposed to the semiconductor layer, and reads the signal electric charge of the electric charge accumulation section; and a through electrode that is provided in the first substrate and the second substrate, wherein the through electrode electrically couples the first substrate and the second substrate to each other, and wherein the through electrode is partially in contact with the gate electrode, wherein a through hole is provided in the gate electrode, and wherein the through electrode is in contact with an inner peripheral surface of the through hole. ### Claim 17 (depends on 16) The solid-state imaging device according to claim 16, wherein the gate electrode is opposed to the semiconductor layer in a plurality of directions. ### Claim 18 (depends on 16) The solid-state imaging device according to claim 16, wherein the semiconductor layer includes at least one fin, and wherein the gate electrode is opposed to a plurality of surfaces of the fin. ### Claim 19 (depends on 18) The solid-state imaging device according to claim 18, wherein the semiconductor layer includes a plurality of the fins, and wherein the semiconductor layer further includes an insulating film provided between adjacent ones of the fins. ### Claim 20 A solid-state imaging device, comprising: a first substrate including a photoelectric converter and an electric charge accumulation section for each pixel, wherein a signal electric charge generated in the photoelectric converter is accumulated in the electric charge accumulation section; a second substrate including a semiconductor layer and a pixel transistor, wherein the semiconductor layer is stacked on the first substrate, wherein the pixel transistor includes a gate electrode opposed to the semiconductor layer, and wherein the pixel transistor reads the signal electric charge of the electric charge accumulation section; a through electrode that is provided in the first substrate and the second substrate, wherein the through electrode electrically couples the first substrate and the second substrate to each other, and wherein the through electrode is partially in contact with the gate electrode; and a shared coupling section that is coupled to a plurality of the electric charge accumulation sections and is provided in the first substrate, wherein—an end of the through electrode is in contact with the shared coupling section.