# US 12,183,734 B2 · Semiconductor device and method for fabricating the same

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- Number: US 12,183,734 B2
- Document ID: US12183734B2
- Status: Granted
- Kind: B2
- Application number: 18/230,052
- Filed: 2023-08-03
- Published: 2023-11-23
- Granted: 2024-12-31
- Earliest claimed: 2018-08-03
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Sang Min Yoo; Ju Youn Kim; Hyung Joo Na; Bong Seok Suh; Joo Ho Jung; Eui Chul Hwang; Sung Moon Lee
- Web page: https://patentgrep.com/patent/US12183734B2

## CPC

- H10D 84/834: {comprising FinFETs}
- H10D 30/795: {being in lateral device isolation regions, e.g. STI}
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 64/118: {Electrodes comprising insulating layers having particular dielectric or electrostatic properties, e.g. having static charges}
- H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations}
- H10W 10/0145: {of trenches having shapes other than rectangular or V-shape (H10W10/0143 takes precedence)}
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10D 84/853: {comprising FinFETs}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

## Claims

### Claim 1

A semiconductor device comprising:
a first active pattern extending along a first direction;
a second active pattern extending along the first direction and spaced apart from the first active pattern in the first direction;
a field insulating film between the first active pattern and the second active pattern; and
an element isolation structure in an isolation trench in the first active pattern and the field insulating film,
wherein the element isolation structure includes a first side wall facing the first active pattern and a second side wall facing the field insulating film, and
the first side wall and the second side wall are asymmetric about a plane including an interface between the first active pattern and the field insulating film.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein an upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein an upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the isolation trench extends along a second direction intersecting the first direction.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the field insulating film and the element isolation structure comprise different materials.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, further comprising a separation spacer extending along the first side wall and the second side wall, on the first active pattern and on the field insulating film.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the isolation trench includes a first trench in the first active pattern and a second trench in the field insulating film, and
wherein a first height of a bottom surface of the first trench is different from a second height of a bottom surface of the second trench.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, further comprising a gate structure extending in a second direction intersecting the first direction, on the first active pattern.

### Claim 9 (depends on 8)

The semiconductor device of claim 8, wherein an upper surface of the gate structure and the upper surface of the element isolation structure are coplanar.

### Claim 10 (depends on 8)

The semiconductor device of claim 8, further comprising a source/drain region in the first active pattern between the element isolation structure and the gate structure.

### Claim 11

A semiconductor device comprising:
a first active pattern extending along a first direction;
a second active pattern extending along the first direction and spaced apart from the first active pattern in the first direction;
a substrate;
a field insulating film on the substrate and between the first active pattern and the second active pattern; and
an element isolation structure in an isolation trench in the first active pattern and the field insulating film,
wherein the isolation trench includes a first trench in the first active pattern and second trench in the field insulating film, and
a first height from an upper surface of the substrate to a bottom surface of the first trench is different from a second height from the upper surface of the substrate to a bottom surface of the second trench.

### Claim 12 (depends on 11)

The semiconductor device of claim 11, wherein an upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns.

### Claim 13 (depends on 11)

The semiconductor device of claim 11, wherein an upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

### Claim 14 (depends on 11)

The semiconductor device of claim 11, wherein the first height is less than the second height.

### Claim 15 (depends on 11)

The semiconductor device of claim 11, wherein the first height is greater than the second height.

### Claim 16 (depends on 11)

The semiconductor device of claim 11, wherein the isolation trench extends along a second direction intersecting the first direction.

### Claim 17 (depends on 11)

The semiconductor device of claim 11, wherein a first width of the field insulating film in the first direction is greater than a second width of the element isolation structure in the first direction.

### Claim 18

A semiconductor device comprising:
a first active pattern extending along a first direction;
a second active pattern extending along the first direction and spaced apart from the first active pattern in the first direction;
a field insulating film between the first active pattern and the second active pattern, an upper surface of the field insulating film being lower than or coplanar with upper surfaces of the first and second active patterns; and
an element isolation structure on the first active pattern and the field insulating film, an upper surface of the element isolation structure being higher than the upper surfaces of the first and second active patterns, and a lower surface of the element isolation structure being lower than the upper surface of the field insulating film,
wherein the element isolation structure includes a first side wall facing the first active pattern and a second side wall facing the field insulating film, and
the first side wall and the second side wall are asymmetric about a plane including an interface between the first active pattern and the field insulating film.

### Claim 19 (depends on 18)

The semiconductor device of claim 18, further comprising:
a substrate on which the field insulating film is formed,
wherein the element isolation structure fills a first trench in the first active pattern and a second trench in the field insulating film, and
wherein a first height from an upper surface of the substrate to a bottom surface of the first trench is different from a second height from the upper surface of the substrate to a bottom surface of the second trench.

### Claim 20 (depends on 18)

The semiconductor device of claim 18, further comprising;
a gate structure extending in a second direction intersecting the first direction, on the first active pattern; and
a source/drain region in the first active pattern between the element isolation structure and the gate structure.