# US 12,183,693 B2 · Integrated magnetic assembly with conductive field plates

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- Number: US 12,183,693 B2
- Document ID: US12183693B2
- Status: Granted
- Kind: B2
- Application number: 18/450,291
- Filed: 2023-08-15
- Published: 2023-11-30
- Granted: 2024-12-31
- Earliest claimed: 2021-05-26
- Assignees: Texas Instruments Incorporated
- Applicants: Texas Instruments Incorporated
- Inventors: Enis Tuncer
- Web page: https://patentgrep.com/patent/US12183693B2

## CPC

- H10W 44/501: {Inductive arrangements (H10W44/20 takes precedence)}
- H01F 27/2804: {Printed windings}
- H01F 27/2819: {Planar transformers with printed windings, e.g. surrounded by two cores and to be mounted on printed circuit}
- H01F 38/50: {Transformers for galvanic isolation}
- H10D 1/20: Inductors
- H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)}
- H10W 70/041: {Connecting or disconnecting interconnections to or from leadframes, e.g. connecting bond wires or bumps}
- H10W 70/40: Leadframes
- H10W 70/411: {Chip-supporting parts, e.g. die pads}
- H10W 70/465: {Bumps or wires}
- H10W 70/475: {Capacitors in combination with leadframes}
- H10W 74/016: {using moulds}
- H10W 74/111: {the semiconductor body being completely enclosed}
- H10W 90/811: {Multiple chips on leadframes}
- H03H 7/0115: {comprising only inductors and capacitors (H03H7/075, H03H7/09, H03H7/12, H03H7/13 take precedence)}
- H03H 2001/0078: {comprising spiral inductor on a substrate}
- H03H 2001/0085: {Multilayer, e.g. LTCC, HTCC, green sheets}
- H10W 72/07236: {Soldering or alloying}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07336: {Soldering or alloying}
- H10W 72/075: {of bond wires}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 72/354: {comprising polymers}
- H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements}
- H10W 72/5449: {not being orthogonal to a side surface of the chip, e.g. fan-out arrangements}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 90/726: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/753: {between laterally-adjacent chips}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/759: {between a chip and a laterally-adjacent discrete passive device}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P)

## Abstract

An electronic device includes a magnetic assembly with a multilevel lamination or metallization structure having a core layer, dielectric layers and conductive features formed in metal layers on or between the dielectric layers in respective planes of orthogonal first and second directions and stacked along an orthogonal third direction. The conductive features include first and second patterned conductive features forming first and second windings, first and second conductive capacitor plates, and first and second conductive field plates, in which the first conductive capacitor plate is between the first conductive field plate and the core layer along the third direction and the second conductive capacitor plate is between the second conductive field plate and the core layer along the third direction.

## Claims

### Claim 1

A packaged electronic device, comprising:
a package structure; and
a magnetic assembly in the package structure, the magnetic assembly including a multilevel lamination or metallization structure having a core layer, dielectric layers and conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers, the core layer and the dielectric layers extending in respective planes of orthogonal first and second directions and stacked along a third direction that is orthogonal to the first and second directions, the conductive features including first and second patterned conductive features, the first patterned conductive feature having multiple turns to form a first winding, the second patterned conductive feature having multiple turns to form a second winding, the core layer positioned between the first and second patterned conductive features along the third direction.

### Claim 2 (depends on 1)

The packaged electronic device of claim 1, further including first and second conductive capacitor plates, the core layer positioned between the first and second conductive capacitor plates along the third direction.

### Claim 3 (depends on 2)

The packaged electronic device of claim 2, further including first and second conductive field plates, the first conductive capacitor plate positioned between the first conductive field plate and the core layer along the third direction.

### Claim 4 (depends on 3)

The packaged electronic device of claim 3, wherein:
the first patterned conductive feature and the first conductive capacitor plate are formed in the same metal layer as each other; and
the second patterned conductive feature and the second conductive capacitor plate are formed in the same metal layer as each other.

### Claim 5 (depends on 1)

The packaged electronic device of claim 1, wherein the magnetic assembly includes a first magnetic core structure attached to a first side of the lamination or metallization structure, and a second magnetic core structure attached to a second side of the lamination or metallization structure.

### Claim 6 (depends on 3)

The packaged electronic device of claim 3, wherein:
the first conductive field plate has a lateral extent in a first field plate plane of the first and second directions that extends beyond a lateral extent of the first conductive capacitor plate; and
the second conductive field plate has a lateral extent in a second field plate plane of the first and second directions that extends beyond a lateral extent of the second conductive capacitor plate.

### Claim 7 (depends on 4)

The packaged electronic device of claim 4, wherein:
the first conductive field plate has a lateral extent in a first field plate plane of the first and second directions that extends beyond a lateral extent of the first conductive capacitor plate; and
the second conductive field plate has a lateral extent in a second field plate plane of the first and second directions that extends beyond a lateral extent of the second conductive capacitor plate.

### Claim 8 (depends on 1)

The packaged electronic device of claim 1, wherein the magnetic assembly includes a first magnetic core structure attached to a first side of the lamination or metallization structure, and a second magnetic core structure attached to a second side of the lamination or metallization structure.

### Claim 9 (depends on 3)

The packaged electronic device of claim 3, wherein the magnetic assembly includes a first magnetic core structure attached to a first side of the lamination or metallization structure, and a second magnetic core structure attached to a second side of the lamination or metallization structure.

### Claim 10 (depends on 3)

The packaged electronic device of claim 3, wherein:
the first conductive field plate has a lateral extent in a first field plate plane of the first and second directions that extends beyond a lateral extent of the first conductive capacitor plate; and
the second conductive field plate has a lateral extent in a second field plate plane of the first and second directions that extends beyond a lateral extent of the second conductive capacitor plate.

### Claim 11 (depends on 9)

The packaged electronic device of claim 9, wherein:
the first conductive field plate has a lateral extent in a first field plate plane of the first and second directions that extends beyond a lateral extent of the first conductive capacitor plate; and
the second conductive field plate has a lateral extent in a second field plate plane of the first and second directions that extends beyond a lateral extent of the second conductive capacitor plate.

### Claim 12 (depends on 11)

The packaged electronic device of claim 11, further comprising:
first conductive leads extending outward from a first side of the package structure;
second conductive leads extending outward from a second side of the package structure;
a first semiconductor die attached to a first die attach pad in the package structure;
a second semiconductor die attached to a second die attach pad in the package structure;
a first set of electrical connections that couple the first semiconductor die, the first patterned conductive feature, and at least one of the first conductive leads in a first circuit; and
a second set of electrical connections that couple the second semiconductor die, the second patterned conductive feature, the conductive guard trace, and at least one of the second conductive leads in a second circuit isolated from the first circuit.

### Claim 13 (depends on 2)

The packaged electronic device of claim 2, wherein the magnetic assembly includes:
a first conductive via coupled between the first conductive capacitor plate and the first conductive field plate; and
a second conductive via coupled between the second conductive capacitor plate and the second conductive field plate.

### Claim 14

A magnetic assembly, comprising:
a multilevel lamination or metallization structure having a core layer, dielectric layers and conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers, the core layer and the dielectric layers extending in respective planes of orthogonal first and second directions and stacked along a third direction that is orthogonal to the first and second directions; and
a magnetic core structure attached to a side of the multilevel lamination or metallization structure;
the conductive features including:
first and second patterned conductive features, the first patterned conductive feature having multiple turns to form a first winding, the second patterned conductive feature having multiple turns to form a second winding, the core layer positioned between the first and second patterned conductive features along the third direction.

### Claim 15 (depends on 14)

The magnetic assembly of claim 14, further including first and second conductive capacitor plates, the core layer positioned between the first and second conductive capacitor plates along the third direction.

### Claim 16 (depends on 15)

The magnetic assembly of claim 15, further including first and second conductive field plates, the first conductive capacitor plate positioned between the first conductive field plate and the core layer along the third direction.

### Claim 17 (depends on 15)

The magnetic assembly of claim 15, wherein:
the first patterned conductive feature and the first conductive capacitor plate are formed in the same metal layer as each other; and
the second patterned conductive feature and the second conductive capacitor plate are formed in the same metal layer as each other.

### Claim 18 (depends on 16)

The magnetic assembly of claim 16, wherein:
the first conductive field plate has a lateral extent in a first field plate plane of the first and second directions that extends beyond a lateral extent of the first conductive capacitor plate; and
the second conductive field plate has a lateral extent in a second field plate plane of the first and second directions that extends beyond a lateral extent of the second conductive capacitor plate.

### Claim 19 (depends on 14)

The magnetic assembly of claim 14, further comprising a second magnetic core structure attached to a second side of the lamination or metallization structure.

### Claim 20 (depends on 16)

The magnetic assembly of claim 16, further comprising:
a first conductive via coupled between the first conductive capacitor plate and the first conductive field plate; and
a second conductive via coupled between the second conductive capacitor plate and the second conductive field plate.

### Claim 21 (depends on 16)

The magnetic assembly of claim 16, further comprising:
a first conductive via coupled between the first conductive capacitor plate and the first conductive field plate; and
a second conductive via coupled between the second conductive capacitor plate and the second conductive field plate.

### Claim 22

A method for fabricating an electronic device, the method comprising:
fabricating a magnetic assembly including: first and second patterned conductive features having multiple turns to form respective first and second windings extending in respective planes of orthogonal first and second directions; first and second conductive capacitor plates spaced apart from opposite sides of a core layer along a third direction orthogonal to the first and second directions; and first and second conductive field plates, the first conductive capacitor plate positioned between the first conductive field plate and the core layer along the third direction, and the second conductive capacitor plate positioned between the second conductive field plate and the core layer along the third direction.

### Claim 23 (depends on 22)

The method of claim 22, further including attaching the magnetic assembly to a support structure.

### Claim 24 (depends on 22)

The method of claim 22, further including attaching a first semiconductor die to a first die attach pad.

### Claim 25 (depends on 24)

The method of claim 24, further including attaching a second semiconductor die to a second die attach pad.

### Claim 26 (depends on 25)

The method of claim 25, further including performing an electrical connection process that couples the first semiconductor die and the first winding in a first circuit, and couples the second semiconductor die and the second winding in a second circuit isolated from the first circuit,
performing a molding process that encloses the magnetic assembly, the first and second die attach pads and the first and second semiconductor dies in a package structure.

### Claim 27 (depends on 26)

The method of claim 26, wherein fabricating the magnetic assembly further includes:
fabricating the first conductive field plate with a lateral extent in a first field plate plane of the first and second directions that extends beyond a lateral extent of the first conductive capacitor plate; and
fabricating the second conductive field plate with a lateral extent in a second field plate plane of the first and second directions that extends beyond a lateral extent of the second conductive capacitor plate.

### Claim 28 (depends on 22)

The method of claim 22, wherein fabricating the magnetic assembly further includes:
fabricating a first conductive via between the first conductive capacitor plate and the first conductive field plate; and
fabricating a second conductive via between the second conductive capacitor plate and the second conductive field plate.