# US 12,183,691 B2 · Semiconductor structure and method of forming the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,183,691 B2 - Document ID: US12183691B2 - Status: Granted - Kind: B2 - Application number: 18/172,968 - Filed: 2023-02-22 - Published: 2023-06-22 - Granted: 2024-12-31 - Earliest claimed: 2019-03-14 - Assignees: Taiwan Semiconductor Manufacturing Company, Ltd. - Applicants: Taiwan Semiconductor Manufacturing Company, Ltd. - Inventors: Ching-Wen Chen; Hung-Jui Kuo; Ming-Che Ho - Web page: https://patentgrep.com/patent/US12183691B2 ## CPC - H10W 42/00: Arrangements for protection of devices (arrangements for thermal protection H10W40/00) - H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) - H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs - H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 70/611: {for connecting multiple chips together} - H10W 70/614: {the multiple chips being integrally enclosed} - H10W 70/65: Shapes or dispositions of interconnections - H10W 70/685: comprising multiple insulating layers - H10W 70/695: Organic materials - H10W 74/016: {using moulds} - H10W 74/117: {the substrate having spherical bumps for external connection} - H10W 70/6528: {of the portions that connect to chips, wafers or package parts} - H10W 72/241: {Dispositions, e.g. layouts} - H10W 72/9413: {on encapsulations} - H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor structure and a method of forming the same are disclosed. A method of forming a semiconductor structure includes the following operations. An insulating layer is formed over a substrate. A metal feature is formed in the insulating layer. An argon-containing plasma treatment is performed to the insulating layer and the metal feature. ## Claims ### Claim 1 A semiconductor structure, comprising: a conductive layer structure over a first device; first pads and second pads over the conductive layer structure; an argon-containing layer over an uppermost insulating layer of the conductive layer structure and aside the first pads and the second pads; and connectors over the first pads, wherein the argon-containing layer comprises a carbon atom content of 75 at % or more and an argon atom content of 0.2-2 at %. ### Claim 2 (depends on 1) The semiconductor structure of claim 1, wherein the argon-containing layer has a wrinkled top surface. ### Claim 3 (depends on 1) The semiconductor structure of claim 1, further comprising a second device over the second pads. ### Claim 4 (depends on 1) The semiconductor structure of claim 1, further comprising an argon-containing layer between two adjacent insulating layers of the conductive layer structure. ### Claim 5 (depends on 1) The semiconductor structure of claim 1, wherein the first device comprises an integrated active device. ### Claim 6 (depends on 1) The semiconductor structure of claim 1, wherein the second device comprises an integrated passive device. ### Claim 7 A semiconductor structure, comprising: an insulating layer disposed over a substrate; a metal feature having a first portion embedded in the insulating layer, and a second portion on the first portion and over the insulating layer; and an argon-containing layer disposed in a surface portion of the insulating layer, located in contact with the second portion but separated from the first portion of the metal feature, wherein the argon-containing layer has a water contact angle of 70° to 120°. ### Claim 8 (depends on 7) The semiconductor structure of claim 7, wherein the argon-containing layer has a water contact angle of 90° to 120°. ### Claim 9 (depends on 7) The semiconductor structure of claim 7, wherein the argon-containing layer has a surface roughness Rz of 0.1 μm or more. ### Claim 10 (depends on 7) The semiconductor structure of claim 7, wherein the argon-containing layer has a thickness of 20 angstroms or more. ### Claim 11 (depends on 7) The semiconductor structure of claim 7, wherein the argon-containing layer comprises a carbon atom content of 75 at % or more and an argon atom content of 0.2-2 at %. ### Claim 12 (depends on 7) The semiconductor structure of claim 7, wherein the argon-containing layer has a wrinkled top surface from a top view. ### Claim 13 A semiconductor structure, comprising: an insulating layer disposed over a substrate; a metal feature having a first portion embedded in the insulating layer, and a second portion on the first portion and over the insulating layer; and an argon-containing layer disposed in a surface portion of the insulating layer, located in contact with the second portion but separated from the first portion of the metal feature, wherein the argon-containing layer comprises a carbon atom content of 75 at % or more and an argon atom content of 0.2-2 at %. ### Claim 14 (depends on 13) The semiconductor structure of claim 13, wherein the argon-containing layer has a surface roughness Rz of 0.1 μm or more. ### Claim 15 (depends on 13) The semiconductor structure of claim 13, wherein the argon-containing layer has a thickness of 20 angstroms or more. ### Claim 16 (depends on 13) The semiconductor structure of claim 13, wherein the argon-containing layer has a wrinkled top surface from a top view. ### Claim 17 (depends on 13) The semiconductor structure of claim 13, wherein the argon-containing layer further comprises a nitrogen atom content of less than 4 at %. ### Claim 18 (depends on 13) The semiconductor structure of claim 13, wherein the argon-containing layer further comprises an oxygen atom content of less than 12 at %. ### Claim 19 (depends on 13) The semiconductor structure of claim 13, wherein the metal feature comprises an under bump metallization pad. ### Claim 20 (depends on 19) The semiconductor structure of claim 19, further comprising a connector electrically connected to the under bump metallization pad.