# US 12,183,684 B2 · Semiconductor device packaging methods

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- Number: US 12,183,684 B2
- Document ID: US12183684B2
- Status: Granted
- Kind: B2
- Application number: 17/511,380
- Filed: 2021-10-26
- Published: 2023-04-27
- Granted: 2024-12-31
- Earliest claimed: 2021-10-26
- Assignees: Applied Materials, Inc.
- Applicants: Applied Materials, Inc.
- Inventors: Mukhles Sowwan; Samer Banna
- Web page: https://patentgrep.com/patent/US12183684B2

## CPC

- H10W 70/65: Shapes or dispositions of interconnections
- H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04)
- H10W 70/095: {of vias therein}
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/685: comprising multiple insulating layers
- H10W 90/00: Package configurations
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 70/635: {Through-vias}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 90/722: {between stacked chips}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor device package. In certain embodiments, a glass or silicon substrate is patterned by laser ablation to form structures for subsequent formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor device package, which may have one or more embedded dies therein. In certain embodiments, an insulating layer is formed over the substrate by laminating a pre-structured insulating film thereon. The insulating film may be pre-structured by laser ablation to form structures therein, followed by selective curing of sidewalls of the formed structures.

## Claims

### Claim 1

A method of forming a semiconductor device package, comprising:
placing a pre-structured insulating film over a patterned substrate, the pre-structured insulating film comprising a flowable, polymer-based dielectric material, wherein
the patterned substrate comprises one or more features formed in a silicon substrate, the one or more features comprising a first via and a cavity, wherein a semiconductor die is placed into the cavity prior to placement of the pre-structured insulating film over the patterned substrate, and
the pre-structured insulating film further comprising a second via formed therein, the second via aligned with the first via upon placement of the pre-structured insulating film;
laminating the pre-structured insulating film onto the patterned substrate;
curing the pre-structured insulating film; and
forming a conductive layer extending through the first via and the second via.

### Claim 2 (depends on 1)

The method of claim 1, further comprising forming the first via in the patterned substrate via a laser ablation process.

### Claim 3 (depends on 1)

The method of claim 1, further comprising:
structuring an insulating film to form the pre-structured insulating film, the structuring comprising:
patterning one or more features into the insulating film via laser ablation, the one or more features comprising the second via; and
selectively curing sidewalls of the features patterned into the insulating film to harden the sidewalls.

### Claim 4 (depends on 1)

The method of claim 1, wherein the pre-structured insulating film comprises an epoxy resin.

### Claim 5 (depends on 4)

The method of claim 4, wherein the epoxy resin comprises ceramic particles.

### Claim 6 (depends on 1)

The method of claim 1, wherein lamination of the pre-structured insulating film onto the patterned substrate causes the flowable, polymer-based dielectric material to fill gaps between surfaces of the semiconductor die and surfaces of the cavity.

### Claim 7

A method of forming a semiconductor device package, comprising:
patterning one or more features into a silicon substrate, the one or more features comprising at least a first via and a cavity, wherein a semiconductor die is placed into the cavity prior to placement of the pre-structured insulating film over the patterned substrate;
placing the silicon substrate onto a first pre-structured insulating film, the first pre-structured insulating film comprising a second via, the second via aligned with the first via upon placement of the silicon substrate;
placing a second pre-structured insulating film over the silicon substrate, the second pre-structured insulating film comprising a third via, the third via aligned with the first via upon placement of the second pre-structured insulating film;
laminating the first pre-structured insulating film and the second pre-structured insulating film onto the silicon substrate;
curing the first pre-structured insulating film and the second pre-structured insulating film; and
forming a conductive layer extending through at least the first via, the second via, and the third via.

### Claim 8 (depends on 7)

The method of claim 7, wherein the silicon substrate is pattered via laser ablation.

### Claim 9 (depends on 7)

The method of claim 7, further comprising:
structuring an insulating film to form the first or second pre-structured insulating film, the structuring comprising:
patterning one or more features into the insulating film via laser ablation, the one or more features comprising the second via; and
selectively curing sidewalls of the features patterned into the insulating film to harden the sidewalls.

### Claim 10 (depends on 7)

The method of claim 7, wherein the first or second pre-structured insulating film comprises an epoxy resin.

### Claim 11 (depends on 10)

The method of claim 10, wherein the epoxy resin comprises ceramic particles.

### Claim 12 (depends on 7)

The method of claim 7, wherein lamination of the pre-structured insulating film onto the silicon substrate causes the flowable, polymer-based dielectric material to fill gaps between surfaces of the semiconductor die and surfaces of the cavity.

### Claim 13

A method of forming a semiconductor device package, comprising:
patterning one or more features into a silicon substrate, the one or more features comprising at least a first via;
placing the silicon substrate onto a first pre-structured insulating film, the first pre-structured insulating film comprising a second via, the second via aligned with the first via upon placement of the silicon substrate;
exposing the first pre-structured insulating film and the silicon substrate to a first lamination process;
placing a second pre-structured insulating film over the silicon substrate, the second pre-structured insulating film comprising a third via, the third via aligned with the first via upon placement of the second pre-structured insulating film;
exposing the first pre-structured insulating film, the substrate, and the second pre-structured insulating film to a second lamination process;
curing the first pre-structured insulating film and the second pre-structured insulating film; and
forming a conductive layer extending through at least the first via, the second via, and the third via.

### Claim 14 (depends on 13)

The method of claim 13, further comprising:
structuring an insulating film to form the first or second pre-structured insulating film, the structuring comprising:
patterning one or more features into the insulating film via laser ablation, the one or more features comprising the second via; and
selectively curing sidewalls of the features patterned into the insulating film to harden the sidewalls.

### Claim 15 (depends on 13)

The method of claim 13, wherein the first pre-structured insulating film or the second pre-structured insulating film comprises an epoxy resin.

### Claim 16 (depends on 15)

The method of claim 15, wherein the epoxy resin comprises ceramic particles.

### Claim 17 (depends on 13)

The method of claim 13, wherein the one or more features patterned into the silicon substrate further comprise a cavity, and wherein a semiconductor die is placed within the cavity prior to placement of the first pre-structured insulating film or the second pre-structured insulating film over the silicon substrate.

### Claim 18 (depends on 17)

The method of claim 17, wherein lamination of the pre-structured insulating film onto the substrate causes the flowable, polymer-based dielectric material to fill gaps between surfaces of the semiconductor die and surfaces of the cavity.
