# US 12,183,646 B2 · Semiconductor device with a dielectric between portions

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- Number: US 12,183,646 B2
- Document ID: US12183646B2
- Status: Granted
- Kind: B2
- Application number: 18/166,922
- Filed: 2023-02-09
- Published: 2023-06-22
- Granted: 2024-12-31
- Earliest claimed: 2019-05-30
- Assignees: Stmicroelectronics Pte Ltd
- Applicants: Stmicroelectronics Pte Ltd
- Inventors: Jing-En Luan
- Web page: https://patentgrep.com/patent/US12183646B2

## CPC

- H10W 74/129: {forming a chip-scale package [CSP]}
- H10W 74/47: comprising organic materials, e.g. plastics or resins
- H10P 54/00: Cutting or separating of wafers, substrates or parts of devices
- H10W 72/019: {of bond pads}
- H10W 72/90: Bond pads, in general
- H10W 74/01: Manufacture or treatment
- H10W 74/014: {using batch processing}
- H10W 74/134: {the encapsulations being in grooves in the semiconductor body}
- H10W 74/147: {the encapsulations being multilayered}
- H10W 90/00: Package configurations
- H10P 52/00: Grinding, lapping or polishing of wafers, substrates or parts of devices
- H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)}
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 72/012: {of bump connectors, dummy bumps or thermal bumps}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 72/536: {the connected ends being ball-shaped}
- H10W 72/5363: {the connected ends being wedge-shaped}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device having a channel between active sections or portions of the device is disclosed. An elastic material, such as dielectric or a polymer, is deposited into the channel and cured to increase flexibility and thermal expansion properties of the semiconductor device. The elastic material reduces the thermal and mechanical mismatch between the semiconductor device and the substrate to which the semiconductor device is coupled in downstream processing to improve reliability. The semiconductor device may also include a plurality of channels formed transverse with respect to each other. Some of the channels extend all the way through the semiconductor device, while other channels extend only partially through the semiconductor device.

## Claims

### Claim 1

A method comprising:
depositing a passivation layer on a first surface of a substrate;
after depositing the passivation layer on the first surface of the substrate, forming a plurality of channels extending into the first surface of the substrate by removing portions at the first surface of the substrate, the first surface opposite a second surface of the substrate;
after forming the plurality of channels, depositing a polymer in each respective channel of the plurality of channels, the depositing including curing the polymer within the plurality of channels and defining a surface of the polymer flush with the first surface of the substrate;
after depositing the polymer within the plurality of channels, forming a first polyimide layer on the passivation layer and on the surface of the polymer;
after depositing the polymer within the plurality of channels, grinding the second surface of the substrate; and
separating the substrate into a plurality of semiconductor devices, the separating including each of the semiconductor devices including at least one channel of the plurality of channels.

### Claim 2 (depends on 1)

The method of claim 1 further comprising, before the forming the plurality of channels:
forming a plurality of contact pads on the first surface of the substrate.

### Claim 3 (depends on 2)

The method of claim 2 further comprising, after the forming the first polyimide layer:
forming a redistribution layer on the first polyimide layer, the forming the redistribution layer including electrically coupling the redistribution layer to at least one of the plurality of contact pads.

### Claim 4 (depends on 3)

The method of claim 3 further comprising, after the forming the redistribution layer:
forming a second polyimide layer on the first polyimide layer and the redistribution layer, the forming including creating recesses through the second polyimide layer to expose portions of the redistribution layer; and
coupling a solder ball to the exposed portions of the redistribution layer.

### Claim 5 (depends on 1)

The method of claim 1 wherein the grinding the second surface of the substrate includes the polymer in each channel of the plurality of channels being coplanar with the second surface of the substrate.

### Claim 6 (depends on 1)

The method of claim 1 wherein the grinding the second surface of the substrate includes reducing a thickness of the substrate, the substrate being between the polymer in each channel and the second surface.

### Claim 7 (depends on 1)

The method of claim 1 wherein the forming the plurality of channels includes forming first ones of the plurality of channels transverse to second ones of the plurality of channels.

### Claim 8

A method, comprising:
forming a plurality of channels extending in a first surface of substrate, the forming the plurality of channels including forming at least one first channel with a first depth and forming at least one second channel with a second depth different from the first depth, and the first and second depths extend in the first surface in a direction transverse to the first surface;
depositing a polymer in each of the plurality of channels and the second channel;
grinding a second surface of the substrate opposite to the first surface; and
separating the substrate into a plurality of semiconductor devices, the separating of the semiconductor devices including each respective semiconductor device of the plurality of semiconductor devices including at least one of the respective channels of the plurality of channels.

### Claim 9 (depends on 8)

The method of claim 8, wherein the first depth is greater than the second depth.

### Claim 10 (depends on 9)

The method of claim 9, wherein the grinding the second surface of the substrate further includes exposing a first end of a first portion of the polymer in the at least one first channel.

### Claim 11 (depends on 10)

The method of claim 10, wherein the grinding the second surface of the substrate further includes leaving a second end of a second portion of the polymer in the second channel covered by the substrate.

### Claim 12 (depends on 10)

The method of claim 10, wherein forming the plurality of channels further includes forming respective channels of the plurality of channels defining a central shape of at least one of the semiconductor devices having at least one of the following of a polygonal shape and a circular shape.

### Claim 13 (depends on 8)

The method of claim 8, wherein forming the at least one first channel further includes forming the at least one first channel transverse to the at least one second channel.

### Claim 14 (depends on 13)

The method of claim 13, wherein forming the at least one second channel further includes forming the at least one second channel to extend across the at least one first channel.

### Claim 15 (depends on 8)

The method of claim 8, wherein forming the at least one second channel includes forming the at least one second channel to be parallel with the at least one second channel.

### Claim 16

A method, comprising:
forming a passivation layer on a first surface of a substrate;
after forming the passivation layer, forming a plurality of channels extending into the first surface of substrate by removing portions of the substrate at the first surface of the substrate, the forming the plurality of channels including forming respective channels of the plurality of channels defining a plurality of shaped portions in the substrate;
after forming the plurality of channels, depositing a polymer in each respective channel of the plurality of channels and defining a surface of the polymer flush with the first surface of the substrate; and
after depositing the polymer in each respective channel of the plurality of channels, separating the substrate into a plurality of semiconductor devices, the separating of the semiconductor devices including each respective semiconductor device of the plurality of semiconductor devices including at least one respective shaped portion at a central region of the respective semiconductor device.

### Claim 17 (depends on 16)

The method of claim 16, wherein the plurality of shaped portions have a polygonal shape.

### Claim 18 (depends on 17)

The method of claim 17, wherein the plurality of shaped portions have a rectangular shape.

### Claim 19 (depends on 17)

The method of claim 17, wherein the polygonal shape has a diamond shape.

### Claim 20 (depends on 16)

The method of claim 16, wherein the plurality of shaped portions have a round shape.