# US 12,183,637 B2 · Fin field-effect transistor and method of forming the same

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- Number: US 12,183,637 B2
- Document ID: US12183637B2
- Status: Granted
- Kind: B2
- Application number: 18/337,855
- Filed: 2023-06-20
- Published: 2023-10-19
- Granted: 2024-12-31
- Earliest claimed: 2021-07-09
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Yu-Chi Pan; Kuo-Bin Huang; Ming-Hsi Yeh; Ying-Liang Chuang; Yu-Te Su; Kuan-Wei Lin
- Web page: https://patentgrep.com/patent/US12183637B2

## CPC

- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 84/014: {the gate conductors having different materials or different implants}
- H10D 64/01318: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314)}
- H10D 64/667: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671)}
- H10D 64/669: {the conductor further comprising additional layers of alloy material, compound material or organic material, e.g. TaN/TiAlN}
- H10D 84/0158: {the components including FinFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/83135: {the IGFETs characterised by having different gate conductor materials or different gate conductor implants}
- H10D 84/834: {comprising FinFETs}
- H10D 30/797: {being in source or drain regions, e.g. SiGe source or drain}
- H10D 62/822: comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method includes depositing a first work function layer over a first and second gate trench. The method includes depositing a second work function layer over the first work function layer. The method includes etching the second work function layer in the first gate trench while covering the second work function layer in the second gate trench, causing the first work function layer in the first gate trench to contain metal dopants that are left from the second work function layer etched in the first gate trench. The method includes forming a first active gate structure and second active gate structure, which include the first work function layer and the metal dopants left from the second work function layer in the first gate trench, and the first work function layer and no metal dopants left behind from the second work function layer, respectively.

## Claims

### Claim 1

A method for manufacturing a semiconductor device, comprising:
forming a plurality of gate trenches over a semiconductor fin;
depositing a first work function layer over the plurality of gate trenches;
depositing a second work function layer over the first work function layer;
performing a first etching process on the second work function layer in a first one of the gate trenches, with a first etching condition, while covering the second work function layers in other ones of the gate trenches; and
performing a second etching process on the second work function layer in a second one of the gate trenches, with a second etching condition, while covering the second work function layers in other ones of the gate trenches; and
forming a first active gate structure and a second active gate structure in the first gate trench and the second gate trench, respectively, wherein the first active gate structure comprises the first work function layer and metal dopants, with a first dopant concentration, that are left from the second work function layer in the first gate trench, and the second active gate structure comprises the first work function layer and the metal dopants, with a second dopant concentration, that are left behind from the second work function layer,
wherein the first etching condition is different from the second etching condition.

### Claim 2 (depends on 1)

The method of claim 1, wherein the first etching process and the second etching process each include applying a wet etching solution over the second work function layer.

### Claim 3 (depends on 2)

The method of claim 2, wherein the wet etching solution comprises a solution selected from the group consisting of: water containing ozone, water containing carbon dioxide, an acid with no hydrogen peroxide, and combinations thereof.

### Claim 4 (depends on 3)

The method of claim 3, wherein the first etching condition includes a first concentration of the wet etching solution, and the second etching condition includes a second concentration of the wet etching solution.

### Claim 5 (depends on 4)

The method of claim 4, wherein the first concentration is lower than the second concentration.

### Claim 6 (depends on 5)

The method of claim 5, wherein the first work function layer in the first gate trench contains metal dopants, with a first dopant concentration, that are left from the second work function layer etched in the first gate trench, and the first work function layer in the second gate trench contains the metal dopants, with a second dopant concentration, that are left from the second work function layer etched in the second gate trench, and wherein the first dopant concentration is lower than the second dopant concentration.

### Claim 7 (depends on 6)

The method of claim 6, wherein the first work function layer includes titanium nitride (TiN), and the second work function layer incudes tungsten carbide nitride (WCN).

### Claim 8 (depends on 7)

The method of claim 7, wherein the metal dopants include tungsten (W).

### Claim 9 (depends on 1)

The method of claim 1, wherein the first dopant concentration is different from the second dopant concentration.

### Claim 10

A method for manufacturing a semiconductor device, comprising:
forming a plurality of gate trenches over a semiconductor fin;
depositing a first work function layer over the plurality of gate trenches;
depositing a second work function layer over the first work function layer;
performing a first etching process on the second work function layer in a first one of the gate trenches, with a first etching condition, while covering the second work function layers in other ones of the gate trenches; and
performing a second etching process on the second work function layer in a second one of the gate trenches, with a second etching condition, while covering the second work function layers in other ones of the gate trenches;
wherein the first etching condition is different from the second etching condition, causing the first work function layer in the first gate trench to contain metal dopants, with a first dopant concentration, that are left from the second work function layer etched in the first gate trench, and the first work function layer in the second gate trench to contain the metal dopants, with a second dopant concentration, that are left from the second work function layer etched in the second gate trench; and
wherein the first dopant concentration is different from the second dopant concentration.

### Claim 11 (depends on 10)

The method of claim 10, wherein the first etching process and the second etching process each include applying a wet etching solution over the second work function layer.

### Claim 12 (depends on 11)

The method of claim 11, wherein the wet etching solution comprises a solution selected from the group consisting of: water containing ozone, water containing carbon dioxide, an acid with no hydrogen peroxide, and combinations thereof.

### Claim 13 (depends on 12)

The method of claim 12, wherein the first etching condition includes a first concentration of the wet etching solution, and the second etching condition includes a second concentration of the wet etching solution, and wherein the first concentration is lower than the second concentration.

### Claim 14 (depends on 10)

The method of claim 10, wherein the first work function layer includes titanium nitride (TiN), and the second work function layer incudes tungsten carbide nitride (WCN).

### Claim 15 (depends on 14)

The method of claim 14, wherein the metal dopants include tungsten (W).

### Claim 16 (depends on 10)

The method of claim 10, further comprising:
forming a first active gate structure and a second active gate structure in the first gate trench and the second gate trench, respectively, wherein the first active gate structure comprises the first work function layer and the metal dopants, with the first dopant concentration, that are left from the second work function layer in the first gate trench, and the second active gate structure comprises the first work function layer and the metal dopants, with the second dopant concentration, that are left behind from the second work function layer.

### Claim 17 (depends on 16)

The method of claim 16, wherein the first and second active gate structures correspond to respective different threshold voltages.

### Claim 18

A method for manufacturing a semiconductor device, comprising:
forming a plurality of gate trenches over a semiconductor fin;
depositing a first work function layer over the plurality of gate trenches;
depositing a second work function layer over the first work function layer;
performing a first etching process on the second work function layer in a first one of the gate trenches, with a first etching condition, while covering the second work function layers in other ones of the gate trenches;
performing a second etching process on the second work function layer in a second one of the gate trenches, with a second etching condition, while covering the second work function layers in other ones of the gate trenches;
wherein the first etching condition is different from the second etching condition, causing the first work function layer in the first gate trench to contain metal dopants, with a first dopant concentration, that are left from the second work function layer etched in the first gate trench, and the first work function layer in the second gate trench to contain the metal dopants, with a second dopant concentration, that are left from the second work function layer etched in the second gate trench, wherein the first dopant concentration is different from the second dopant concentration;
forming a first active gate structure and a second active gate structure in the first gate trench and the second gate trench, respectively, wherein the first active gate structure comprises the first work function layer and the metal dopants, with the first dopant concentration, that are left from the second work function layer in the first gate trench, and the second active gate structure comprises the first work function layer and the metal dopants, with the second dopant concentration, that are left behind from the second work function layer.

### Claim 19 (depends on 18)

The method of claim 18, wherein the first and second active gate structures correspond to respective different threshold voltages.

### Claim 20 (depends on 18)

The method of claim 18, wherein the metal dopants include tungsten (W).